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Hiroyuki Yagi

dblp:79/1243 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2009
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
3 papers
Processor architecture and microarchitecture · 35% Electronic design automation · 34% Embedded and real-time systems · 20%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › system-level design
electronic system level design		 0.122008
ESL hand-off: fact or EDA fiction? · DAC 2008
Multicore design is the challenge! what is the solution? · DAC 2008
Embedded and real-time systems › embedded software
embedded software design		 0.112009
The wild west: conquest of complex hardware-dependent software design · DAC 2009
Processor architecture and microarchitecture
chip multiprocessor		 0.112008
Multicore design is the challenge! what is the solution? · DAC 2008
Processor architecture and microarchitecture
multicore design		 0.112008
Multicore design is the challenge! what is the solution? · DAC 2008
Electronic design automation
high-level synthesis		 0.012008
Multicore design is the challenge! what is the solution? · DAC 2008
Interconnection networks and networks-on-chip
on-chip interconnect		 0.012008
Multicore design is the challenge! what is the solution? · DAC 2008
Integrated circuit design › digital system design
register-transfer level design		 0.012008
ESL hand-off: fact or EDA fiction? · DAC 2008
YearPublicationVenuePosition
2009 The wild west: conquest of complex hardware-dependent software design
abstract
Embedded SW design can be compared to the lawless wild west. With no clear methodology and no standard multi core platform modeling environment every company has to improvise its own solution. The problems facing embedded software users are becoming more complex since:
Hiroyuki Yagi, Wolfgang Rosenstiel, Jakob Engblom, Jason Andrews, Kees A. Vissers, Marc Serughetti
 DAC1
2008 Multicore design is the challenge! what is the solution?
abstract
Multi Processor SoC (MPSoC) are being designed today. MPSoC design can help achieve aggressive performance and low power targets but it creates new design challenges: How to design the interconnect fabric and memory sub-system to allow the massive data movement required in a multi processor SoC environment? How to develop, debug and verify HW and SW functionality in a MPSoC design? Is MPSoC design an inflection point that will require new design methods including ESL methodologies?
Eshel Haritan, Toshihiro Hattori, Hiroyuki Yagi, Pierre G. Paulin, Marilyn Wolf, Achim Nohl, Drew Wingard, Mike Muller
 DAC3
2008 ESL hand-off: fact or EDA fiction?
abstract
Moving up in the level of abstraction is the holy grail of EDA. Each transition to the next level of abstraction allows 100x improvement in simulation speed and 100x improvement in design productivity. ESL is being promoted as the next level above RTL but is it really happening?
Hiroyuki Yagi, Wolfgang Roesner, Tim Kogel, Eshel Haritan, Hidekazu Tangi, Michael McNamara, Gary Smith 0001, Nikil Dutt, Giovanni Mancini
 DAC1