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Eiji Takeda

dblp:79/225 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2008
0000-0002-3328-6610ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Hardware reliability and fault tolerance · 67% Electronic design automation · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware reliability and fault tolerance › aging
hot-carrier effect
0.011993
VLSI reliability challenges: from device physics to wafer scale systems · Proc. IEEE 1993
Hardware reliability and fault tolerance › reliability analysis
VLSI reliability
0.011993
VLSI reliability challenges: from device physics to wafer scale systems · Proc. IEEE 1993
Electronic design automation › hardware verification and test › VLSI testing
wafer testing
0.011993
VLSI reliability challenges: from device physics to wafer scale systems · Proc. IEEE 1993

Methods — techniques the papers use, named apart from their topics

failure analysis · 0.0device physics modeling · 0.0
YearPublicationVenuePosition
2008 Exploitation Procedure Based on eigenvector Revisited: the Concept of Weighted Preference Flows in multicriteria outranking Analysis
abstract
The outranking analysis has been frequently used to deal with the complex decisions involving qualitative criteria and imprecise data. So far, various versions of ELECTRE have been proposed for ranking alternatives in the outranking analysis. Among others, ELECTRE III has been widely used. A distillation procedure using a qualification index is proposed to rank alternatives from the fuzzy outranking relation. A weakness of ELECTRE III, however, is to involve the arbitrariness in the selection of the discrimination threshold function for the distillation procedure. On the other hand, various variants of PROMETHEE has also been proposed for the outranking analysis. PROMETHEE intends to be simple and easy to understand. A deficiency of PROMETHEE is that it does not take discordance into account when the outranking relation matrix is constructed. This note revisits an exploitation procedure based on eigenvector using the “weighted” preference in-and out-flows of each alternative in the outranking analysis. The basic idea is that it should be better to outrank a “strong” alternative than a “weak” one and, conversely, it is less serious to be outranked by a “strong” alternative than by a “weak” one in a PROMETHEE context. It has a completely different interpretation with the AHP (Analytic Hierarchy Process) since the components of the fuzzy (valued) outranking relation matrix are neither ratios nor reciprocal as in the AHP.
Santha Chenayah, Eiji Takeda
Cybern. Syst.2
1993 VLSI reliability challenges: from device physics to wafer scale systems
abstract
The philosophical and practical differences between Japanese and US IC industries in regard to VLSI reliability, as well as recent research topics and new analysis methods such as wafer scale testing, are discussed. It is suggested that a new approach to VLSI reliability is needed in response to the paradigm shift being brought about by simple scaling limitations, increased process complexity and application of VLSI to advanced systems. An example of this shift is the movement from simple failure analysis by sampling the output of a manufacturing line to the building-in-reliability approach. To introduce and expand on the building-in reliability approach in VLSIs, the authors discuss the required deeper physical understanding of such important processes as hot-carrier effects, dielectrics and metallization.>
Eiji Takeda, Kunihiko Ikuzaki, Hisao Katto, Yuzuru Ohji, Kenji Hinode, Akemi Hamada, Toshiyuki Sakuta, Takahiro Funabiki, Toshio Sasaki
Proc. IEEE1