In this paper, we introduce Distributed Grid Partition, a distributed greedy deployment algorithm for outdoor IoT camera networks. The proposed algorithm optimizes visual network coverage over 2.5D terrain. The main idea behind Distributed Grid Partition is that each deployment node tries to find the best vantage point in its neighborhood that will maximize the network's overall visual coverage. It does so by using information from its immediate neighbors. In order to achieve a favorable cost-performance trade-off, Distributed Grid Partition uses height as a proxy for visual coverage, or fitness, avoiding expensive fitness computations. In addition, each node's contribution to network fitness is determined without knowledge of the overall network using the concept of "Wonderful Life Utility". Our experimental results show that Distributed Grid Partition results in deployments with superior coverage-cost performance when compared to other distributed optimization algorithms as well as a centralized greedy set cover heuristic.

We present TerrainLOS, an outdoor propagation model that uses Digital Elevation Models to determine whether two nodes can communicate. We have implemented TerrainLOS in the sensor network simulator COOJA and used it to evaluate how the roughness of terrain, which we classify using Average Cumulative Visibility, affects the number of edges, connectedness, latency, and power of a network. We compare the difference in results when using TerrainLOS and a simpler propagation model to show how the performance of outdoor simulation is greatly affected by a model that takes terrain into account.

We propose a novel distributed deployment algorithm for sensor networks whose nodes reside upon and are obstructed by 2.5D terrain. Our algorithm optimizes area coverage by computing cumulative visibility over terrain. Through simulation and comparison to centralized algorithms, we demonstrate that our distributed algorithm achieves good results and degrades gracefully with reduced internode communication. To the best of our knowledge, our distributed deployment algorithm is the first use of a distributed simulated annealing algorithm for sensor network deployment. In addition, to our knowledge, this is the first time range-limited cumulative visibility is used to guide sensor deployment over 2.5D terrain. Our results show that a centralized Simulated Annealing algorithm outperforms Pattern Search and Gradient Ascent approaches. Results also show that our version of Distributed Simulated Annealing performs well, degrading gracefully as communication radius is reduced.

In this paper, we explore a novel approach to end-to-end round-trip time (RTT) estimation using a machine-learning technique known as the Experts Framework. In our proposal, each of several "experts" guesses a fixed value. The weighted average of these guesses estimates the RTT, with the weights updated after every RTT measurement based on the difference between the estimated and actual RTT. Through extensive simulations we show that the proposed machine-learning algorithm adapts very quickly to changes in the RTT. Our results show a considerable reduction in the number of retransmitted packets and a increase in goodput, in particular on more heavily congested scenarios. We corroborate our results through "live" experiments using an implementation of the proposed algorithm in the Linux kernel. These experiments confirm the higher accuracy of the machine learning approach with more than 40% improvement, not only over the standard TCP, but also over the well known Eifel RTT estimator.

The Embedded System Block (ESB) of the APEX E programmable logic device family from Altera Corporation includes the capability of implementing content addressable memory (CAM) as well as product term macrocells, ROM, and dual port RAM. In CAM mode each ESB can implement a 32 word CAM with 32 bits per word. In product term mode, each ESB has 16 macrocells built out of 32 product terms with 32 literal inputs. The ability to reconfigure memory blocks in this way represents a new and innovative use of resources in a programmable logic device, requiring creative solutions in both the hardware and software domains. The architecture and features of this Embedded System Block are described.

Architects of programmable logic devices (PLDs) face several challenges when optimizing a new device family for low manufacturing cost. When given an aggressive die-size goal, functional blocks that seem otherwise insignificant become targets for area reduction. Once low die cost is achieved, it is seen that testing and packaging costs must be considered. Interactions among these three cost contributors pose trade-offs that prevent independent optimization. This paper discusses solutions discovered by the architects optimizing the Altera FLEX 6000 architecture.