EDBT 2026 Demo / reviewers in the wild / expert
Vladimir A. Frolov
dblp:79/7081
· DBLP profile ↗
2ranked-venue papers
0as first author
1since 2021 · last 2026
0000-0001-8829-9884ORCID · verified
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 since 2021Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer graphics and multimedia
1 paper |
Geometric modeling and processing · 44% Rendering · 44% Visualization and visual analytics · 13% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Rendering › ray tracing
real-time ray tracing |
1.0 | 1 | 2026 | SCom DAG: compact representation of spatial data for real-time rendering · ACM Trans. Graph. 2026 |
Geometric modeling and processing
spatial data structures |
1.0 | 1 | 2026 | SCom DAG: compact representation of spatial data for real-time rendering · ACM Trans. Graph. 2026 |
Visualization and visual analytics
volume visualization |
0.3 | 1 | 2026 | SCom DAG: compact representation of spatial data for real-time rendering · ACM Trans. Graph. 2026 |
Electronic design automation › hardware verification and test
formal verification |
0.1 | 1 | 2009 | Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation · CAV 2009 |
Electronic design automation › hardware verification and test
hardware verification |
0.1 | 1 | 2009 | Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation · CAV 2009 |
Methods — techniques the papers use, named apart from their topics
octree subdivision · 1.0lossy compression · 1.0formal verification · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | SCom DAG: compact representation of spatial data for real-time renderingabstractWe developed a new data structure for the efficient representation of spatial data, called SCom DAG — Similarity Compressed Directed Acyclic Graph. It subdivides space with an octree and utilizes local data similarities and topology for compact encoding. Our method exploits the fact that many surface and volume areas are similar to each other up to a transformation. We store spatial transformations on the edges of the graph and data transformations on terminal links pointing to data blocks. Compression is achieved mainly by reducing the number of graph nodes and data blocks while maintaining the same number of paths in the graph. Spatial transformations are compact due to the use of hyper-octahedral groups that are relatively small even in 4D space. SCom DAG works with data of different dimensionality, such as 2D textures, 3D meshes and 4D time-varying volumetric data. Thus, it is well suited for volumetric data visualization and rendering large scenes. The proposed algorithm performs lossy compression, creating a compact representation of various data with controlled quality, which is especially valuable for low-end devices and convenient browser use. It provides a balance of compression and quality comparable to state-of-the-art technologies in various domains, such as compact texture and geometry representation, volumetric data, radiance fields, and precomputed 4D volume animations. At the same time, our data structure enables fast sampling and real-time ray tracing, and its hierarchical nature allows for rendering with a continuous level of detail. Albert Garifullin, Nikolay Mayorov, Eduard Hauer, Alexey G. Voloboy, Vladimir A. Frolov |
ACM Trans. Graph. | 5 |
| 2009 | Replacing Testing with Formal Verification in Intel CoreTM i7 Processor Execution Engine Validation
Roope Kaivola, Rajnish Ghughal, Naren Narasimhan, Amber Telfer, Jesse Whittemore, Sudhindra Pandav, Anna Slobodová, Vladimir A. Frolov, Erik Reeber, Armaghan Naik |
CAV | 9 |