Demo Data from EDBT 2026 / reviewers in the wild / expert
Takashi Soma
dblp:79/7684
· DBLP profile ↗
4ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 2Graphics, computer vision, multimedia, augmented reality and games · 2Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Integrated circuit design · 83% Memory systems · 17% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
digital circuit design |
0.0 | 1 | 1960 | Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960 |
Integrated circuit design › digital circuit design › logic design
logic circuits |
0.0 | 1 | 1960 | Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960 |
Integrated circuit design › digital circuit design › logic families
tunnel diode logic circuits |
0.0 | 1 | 1960 | Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960 |
Memory systems
delay-line memory |
0.0 | 1 | 1960 | Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960 |
Memory systems › random-access memory
dynamic memory |
0.0 | 1 | 1960 | Esaki Diode High-Speed Logical Circuits · IRE Trans. Electron. Comput. 1960 |
Methods — techniques the papers use, named apart from their topics
subharmonic oscillator · 0.0majority logic · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2010 | Ternary multiway switch and its implementation by neuron-like elementabstractTernary multiway switch by logic element utilizing third subharmonic oscillation (phasor based ternary logic) can be regarded as a complex-valued neural network. After showing various functions multiway switches can perform, including Fourier transform, by extending the original functionality as a memory address selector, its implementation by neuron-like element is considered as a model of natural neural networks by complex-valued artificial neural networks, and a search for pulse coded phasor signal in the real world is proposed. Takako Soma, Takashi Soma |
IJCNN | 2 |
| 1995 | Design of 2-D variable digital filters with arbitrary magnitude characteristics
Tian-Bo Deng, Takashi Soma |
Signal Process. | 2 |
| 1988 | Analysis and manipulation methods of geographic informationsabstractGeographic-feature extraction methods based on a mesh data model, covering a wide range of features such as surface area, solid volume, slope features, and ridge valley features are proposed. These methods can be applied also for change analysis between multiterm models for a specific area. By analyzing two models measured in different time in the same area, some dynamic informations about the change during the period has been quantitatively and qualitatively obtained.> Kang Cheng 0002, Masanori Idesawa, Takashi Soma |
ICPR | 3 |
| 1960 | Esaki Diode High-Speed Logical CircuitsabstractLogical circuits using Esaki diodes, and which are based on a principle similar to parametron (subharmonic oscillator element) circuits, are described. Two diodes are used in series to form a basic element called a twin, and a binary digit is represented by the polarity of the potential induced at the middle point of the twin, which is controlled by the majority of input signals applied to the middle point. Unilateral transmission of information in circuits consisting of cascaded twins is achieved by dividing the twins into three groups and by energizing each group one after another in a cyclic manner. Experimental results with the clock frequency as high as 30 mc are reported. Also, a delay-line dynamic memory and a nondestructive memory in matrix form are discussed. Eiichi Goto, Kenro Murata, Kisaburo Nakazawa, Keisuke Nakagawa, Tohru Moto-Oka, Yasushi Miatsu-Oka, Yoshihiro Ishibashi, Haruhisa Ishida, Takashi Soma, Eiiti Wada |
IRE Trans. Electron. Comput. | 9 |