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Morihiro Ikeda

dblp:79/813 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 75% Memory systems · 25%

Topics — the 3 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Memory systems
cache
0.011987
Performance and Architectural Evaluation of the PSI Machine · ASPLOS 1987
Processor architecture and microarchitecture › special-purpose processor
prolog machine architecture
0.011987
Performance and Architectural Evaluation of the PSI Machine · ASPLOS 1987
Processor architecture and microarchitecture
register file
0.011987
Performance and Architectural Evaluation of the PSI Machine · ASPLOS 1987

Methods — techniques the papers use, named apart from their topics

workload characterization · 0.0performance measurement · 0.0
YearPublicationVenuePosition
1987 Performance and Architectural Evaluation of the PSI Machine
abstract
We evaluated a Prolog machine PSI (Personal Sequential Inference machine) for the purpose of improving and redesigning it. In this evaluation, we measured the execution speed and the dynamic characteristics of cache memory, register file, and branching hardware introduced for high-speed execution of Prolog programs.Execution speed of the PSI firmware interpreter was found to be comparable to that of the DEC-10 Prolog compiled code on the DEC-2060. It was also found that PSI was faster than DEC for executing programs containing much unification and backtracking that require runtime processing.With the cache memory, the hit ratio for application programs was found higher than 96%; this demonstrates that the Prolog execution has much memory access locality. The memory access frequency and the appearance ratio between Read and Write command were also investigated.Concerning the register file, use rate of each dedicated access mode was measured and effect of each mode was discussed. In the branching function we confirmed a high appearance rate of conditional branches and multi-way branches based on tag values.
Kazuo Taki, Katsuto Nakajima, Hiroshi Nakashima, Morihiro Ikeda
ASPLOS4