Jingyu Kang

dblp:80/2055 · DBLP profile ↗
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10ranked-venue papers
4as first author
1since 2021 · last 2025
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 6 · 3 first-authorApplied, interdisciplinary, general and emerging computing · 3 · 1 first-author · 1 since 2021Systems, architecture and hardware · 1Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Theoretical computer science
5 papers
Coding theory · 100%

Topics — the 11 heaviest of 11, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Coding theory › error-correcting codes
LDPC codes
0.552011
An Iterative Decoding Algorithm with Backtracking to Lower the Error-Floors of LDPC Codes · IEEE Trans. Commun. 2011
Quasi-cyclic LDPC codes: an algebraic construction · IEEE Trans. Commun. 2010
High Performance Non-Binary Quasi-Cyclic LDPC Codes on Euclidean Geometries LDPC Codes on Euclidean Geometries · IEEE Trans. Commun. 2009
Coding theory › error-correcting codes › decoding
iterative decoding
0.342011
An Iterative Decoding Algorithm with Backtracking to Lower the Error-Floors of LDPC Codes · IEEE Trans. Commun. 2011
Two reliability-based iterative majority-logic decoding algorithms for LDPC codes · IEEE Trans. Commun. 2009
Quasi-cyclic LDPC codes: an algebraic construction · IEEE Trans. Commun. 2010
Coding theory › error-correcting codes › code construction
algebraic construction
0.112010
Quasi-cyclic LDPC codes: an algebraic construction · IEEE Trans. Commun. 2010
Coding theory › error-correcting codes › LDPC codes
quasi-cyclic LDPC codes
0.112010
Quasi-cyclic LDPC codes: an algebraic construction · IEEE Trans. Commun. 2010
Coding theory
error-correcting codes
0.112009
Two reliability-based iterative majority-logic decoding algorithms for LDPC codes · IEEE Trans. Commun. 2009
Coding theory › error-correcting codes › decoding
majority-logic decoding
0.112009
Two reliability-based iterative majority-logic decoding algorithms for LDPC codes · IEEE Trans. Commun. 2009
Coding theory › error-correcting codes › decoding › iterative decoding
belief propagation
0.122010
Quasi-cyclic LDPC codes: an algebraic construction · IEEE Trans. Commun. 2010
High Performance Non-Binary Quasi-Cyclic LDPC Codes on Euclidean Geometries LDPC Codes on Euclidean Geometries · IEEE Trans. Commun. 2009
Coding theory › error-correcting codes › code construction › algebraic construction
algebraic code construction
0.122009
High Performance Non-Binary Quasi-Cyclic LDPC Codes on Euclidean Geometries LDPC Codes on Euclidean Geometries · IEEE Trans. Commun. 2009
Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersions - [transactions papers] · IEEE Trans. Commun. 2009
Coding theory › error-correcting codes › error probability analysis
error floor
0.012011
An Iterative Decoding Algorithm with Backtracking to Lower the Error-Floors of LDPC Codes · IEEE Trans. Commun. 2011
Coding theory › error-correcting codes › decoding › iterative decoding › iterative hard-decision decoding
bit-flipping decoding
0.012009
Two reliability-based iterative majority-logic decoding algorithms for LDPC codes · IEEE Trans. Commun. 2009
Coding theory › error-correcting codes › erasure coding
burst erasure correction
0.012009
Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersions - [transactions papers] · IEEE Trans. Commun. 2009

Methods — techniques the papers use, named apart from their topics

array dispersion · 0.2semi-analytical error-floor prediction · 0.1message passing · 0.1sum-product algorithm · 0.1finite field construction · 0.1reliability-based message passing · 0.1circulant permutation matrices · 0.1binary message passing · 0.1belief propagation decoding · 0.1array masking · 0.1
YearPublicationVenuePosition
2025 Analytical and computational solution for the estimation of SNP-heritability in biobank-scale and distributed datasets
abstract
For a complex trait, heritability ([Formula: see text]) gives the genetic determination of its variation. Given the emergence of biobank-scale data, a more powerful method is needed to estimate [Formula: see text]. Based on the framework of Haseman-Elston regression (RHE-reg), we integrate a fast randomization algorithm to estimate [Formula: see text], and RHE-reg can tackle biobank-scale data, such as UK Biobank (UKB), very efficiently. Furthermore, we present an analytical solution that balances computational cost and precision of the estimation, a property that is important in dealing with biobank-scale data. We investigated the performance of the RHE-reg in simulated data and also applied it for 81 UKB quantitative traits; as tested in UKB data of nearly 300,000 unrelated individuals, it took on average about 4.5 hours to complete an estimation when used 10 CPUs. We extended the application of RHE-reg into distributed datasets when privacy is not compromised. As shown in UKB and simulated data the performance of RHE-reg was accurate in estimating [Formula: see text]. The software for estimating SNP-heritability for biobank-scale data is released.
Guo-An Qi, Qi-Xin Zhang, Jingyu Kang, Tianyuan Li, Xiyun Xu, Zhe Fan, Guo-Bo Chen
PLoS Comput. Biol.3
2011 An Iterative Decoding Algorithm with Backtracking to Lower the Error-Floors of LDPC Codes
abstract
Error-floors are the main reason for excluding LDPC codes from applications requiring very low bit-error rate. They are attributed to a particular structure in the codes' Tanner graphs, known as trapping sets, which traps the message-passing algorithms commonly used to decode LDPC codes, and prevents decoding from converging to the correct codeword. A technique is proposed to break trapping sets while decoding. Based on decoding results leading to a decoding failure, some bits are identified in a previous iteration and flipped and decoding is restarted. This backtracking may enable the decoder to get out of the trapped state. A semi-analytical method is also proposed to predict the error-floor after backtracking. Simulation results indicate the effectiveness of the proposed technique in lowering the error-floor. The technique, which has moderate complexity overhead, is applicable to any code without requiring a prior knowledge of the structure of its trapping sets.
Jingyu Kang, Qin Huang 0002, Shu Lin 0001, Khaled A. S. Abdel-Ghaffar
IEEE Trans. Commun.1
2010 Quasi-cyclic LDPC codes: an algebraic construction
abstract
This paper presents two new large classes of QC-LDPC codes, one binary and one non-binary. Codes in these two classes are constructed by array dispersions of row-distance constrained matrices formed based on additive subgroups of finite fields. Experimental results show that codes constructed perform very well over the AWGN channel with iterative decoding based on belief propagation. Codes of a subclass of the class of binary codes have large minimum distances comparable to finite geometry LDPC codes and they offer effective tradeoff between error performance and decoding complexity when decoded with low-complexity reliability-based iterative decoding algorithms such as binary message passing decoding algorithms. Non-binary codes decoded with a Fast-Fourier Transform based sum-product algorithm achieve significantly large coding gains over Reed-Solomon codes of the same lengths and rates decoded with either the hard-decision Berlekamp-Massey algorithm or the algebraic soft-decision Kotter-Vardy algorithm. They have potential to replace Reed-Solomon codes in some communication or storage systems where combinations of random and bursts of errors (or erasures) occur.
Jingyu Kang, Qin Huang 0002, Li Zhang 0030, Bo Zhou 0015, Shu Lin 0001
IEEE Trans. Commun.1
2009 Accelerating FPGA-based emulation of quasi-cyclic LDPC codes with vector processing
abstract
FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of quasi-cyclic (QC) LDPC codes that takes advantage of the high bandwidth of the embedded memory blocks (called Block RAMs in a Xilinx FPGA) by packing multiple messages into the same word. We describe a vectorized overlapped message passing algorithm that results in 3.5times to 5.5times speedup over state-of-the-art FPGA implementations in literature.
Xiaoheng Chen, Jingyu Kang, Shu Lin 0001, Venkatesh Akella
DATE2
2009 Two reliability-based iterative majority-logic decoding algorithms for LDPC codes
abstract
This paper presents two novel reliability-based iterative majority-logic decoding algorithms for LDPC codes. Both algorithms are binary message-passing algorithms and require only logical operations and integer additions. Consequently, they can be implemented with simple combinational logic circuits. They either outperform or perform just as well as the existing weighted bit-flipping or other reliability-based iterative decoding algorithms for LDPC codes in error performance with a faster rate of decoding convergence and less decoding complexity. Compared to the sum-product algorithm for LDPC codes, they offer effective trade-offs between performance and decoding complexity.
Qin Huang 0002, Jingyu Kang, Li Zhang 0030, Shu Lin 0001, Khaled A. S. Abdel-Ghaffar
IEEE Trans. Commun.2
2009 Construction of non-binary quasi-cyclic LDPC codes by arrays and array dispersions - [transactions papers]
abstract
This paper presents two algebraic methods for constructing high performance and efficiently encodable nonbinary quasi-cyclic LDPC codes based on arrays of special circulant permutation matrices and multi-fold array dispersions. Codes constructed based on these methods perform well over the AWGN and other types of channels with iterative decoding based on belief-propagation. Experimental results show that over the AWGN channel, these non-binary quasi-cyclic LDPC codes significantly outperform Reed-Solomon codes of the same lengths and rates decoded with either algebraic hard-decision Berlekamp-Massey algorithm or algebraic soft-decision Kötter- Vardy algorithm. Also presented in this paper is a class of asymptotically optimal LDPC codes for correcting bursts of erasures. Codes constructed also perform well over flat fading channels. Non-binary quasi-cyclic LDPC codes have a great potential to replace Reed-Solomon codes in some applications in communication environments and storage systems for combating mixed types of noises and interferences.
Bo Zhou 0015, Jingyu Kang, Shumei Song, Shu Lin 0001, Khaled A. S. Abdel-Ghaffar, Meina Xu
IEEE Trans. Commun.2
2009 High Performance Non-Binary Quasi-Cyclic LDPC Codes on Euclidean Geometries LDPC Codes on Euclidean Geometries
abstract
This paper presents algebraic methods for constructing high performance and efficiently encodable non-binary quasi-cyclic LDPC codes based on flats of finite Euclidean geometries and array masking. Codes constructed based on these methods perform very well over the AWGN channel. With iterative decoding using a fast Fourier transform based sum-product algorithm, they achieve significantly large coding gains over Reed-Solomon codes of the same lengths and rates decoded with either algebraic hard-decision Berlekamp-Massey algorithm or algebraic soft-decision Kotter-Vardy algorithm. Due to their quasi-cyclic structure, these non-binary LDPC codes on Euclidean geometries can be encoded using simple shift-registers with linear complexity. Structured non-binary LDPC codes have a great potential to replace Reed-Solomon codes for some applications in either communication or storage systems for combating mixed types of noise and interferences.
Bo Zhou 0015, Jingyu Kang, Ying Yu Tai, Shu Lin 0001, Zhi Ding 0001
IEEE Trans. Commun.2
2008 A Two-Stage Iterative Decoding of LDPC Codes for Lowering Error Floors
abstract
In iterative decoding of LDPC codes, trapping sets often lead to high error floors. In this work, we propose a two-stage iterative decoding to break trapping sets. Simulation results show that the error floor performance can be significantly improved with this decoding scheme.
Jingyu Kang, Li Zhang 0030, Zhi Ding 0001, Shu Lin 0001
GLOBECOM1
2008 LDPC coding schemes for error control in a multicast network
abstract
This paper investigates error control at the physical layer of a multicast network using low-density parity-check (LDPC) codes. Packets for transmission are encoded into LDPC codewords. A joint iterative message-passing scheme for decoding LDPC codewords at a receive node in the network is proposed to improve error performance. Also proposed is a split-codeword transmission to provide equal error protection for all transmitted packets. Density evolution analysis and some simulation results are also presented.
Jingyu Kang, Bo Zhou 0015, Zhi Ding 0001, Shu Lin 0001
ISIT1
2008 Array dispersions of matrices and constructions of quasi-cyclic LDPC codes over non-binary fields
abstract
This paper presents two new algebraic constructions of high performance non-binary quasi-cyclic LDPC codes based on array dispersions of matrices over non-binary fields. Codes constructed perform well over the AWGN channel with iterative decoding using aFastFourierTransformbased sum-product algorithm. They achieve significantly large coding gains over Reed-Solomon codes of the same lengths and rates decoded with either the hard-decision Berlekamp-Massey algorithm or the algebraic soft-decision Koetter-Vardy algorithm. Due to their quasi-cyclic structure, they can be efficiently encoded using simple shift-registers with linear complexity. They have a potential to replace RS codes for some applications in communication and storage systems.
Bo Zhou 0015, Li Zhang 0030, Jingyu Kang, Qin Huang 0002, Shu Lin 0001, Khaled A. S. Abdel-Ghaffar
ISIT3