EDBT 2026 Demo / reviewers in the wild / expert
Jan-Willem Maessen
dblp:80/2537
· DBLP profile ↗
7ranked-venue papers
3as first author
0since 2021 · last 2008
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Software engineering, systems software and programming languages · 5 · 3 first-authorSystems, architecture and hardware · 2Theory of computation · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Software engineering, system software, and programming languages
3 papers |
Concurrent programming · 65% Programming languages and type systems · 34% Compilers and program optimization · 2% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Memory systems · 48% Processor architecture and microarchitecture · 37% Parallel and multicore computing · 15% |
Topics — the 13 heaviest of 14, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Concurrent programming › transactional memory
hardware transactional memory |
0.1 | 1 | 2008 | Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory · PPoPP 2008 |
Concurrent programming › transactional memory
nested transactions |
0.1 | 1 | 2008 | Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory · PPoPP 2008 |
Concurrent programming
transactional memory |
0.1 | 1 | 2008 | Split hardware transactions: true nesting of transactions using best-effort hardware transactional memory · PPoPP 2008 |
Processor architecture and microarchitecture
instruction reordering |
0.1 | 1 | 2006 | Memory Model = Instruction Reordering + Store Atomicity · ISCA 2006 |
Memory systems › memory consistency
memory consistency model |
0.1 | 1 | 2006 | Memory Model = Instruction Reordering + Store Atomicity · ISCA 2006 |
Programming languages and type systems › type systems
dimensional analysis |
0.0 | 1 | 2004 | Object-oriented units of measurement · OOPSLA 2004 |
Programming languages and type systems › object-oriented programming
metaclasses |
0.0 | 1 | 2004 | Object-oriented units of measurement · OOPSLA 2004 |
Programming languages and type systems
type systems |
0.0 | 1 | 2004 | Object-oriented units of measurement · OOPSLA 2004 |
Concurrent programming › memory models
java memory model |
0.0 | 1 | 2000 | Improving the Java memory model using CRF · OOPSLA 2000 |
Concurrent programming
memory models |
0.0 | 1 | 2000 | Improving the Java memory model using CRF · OOPSLA 2000 |
Memory systems
cache coherence |
0.0 | 1 | 2006 | Memory Model = Instruction Reordering + Store Atomicity · ISCA 2006 |
Programming languages and type systems › type systems › polymorphism
parametric polymorphism |
0.0 | 1 | 2004 | Object-oriented units of measurement · OOPSLA 2004 |
Compilers and program optimization
code generation |
0.0 | 1 | 2000 | Improving the Java memory model using CRF · OOPSLA 2000 |
Methods — techniques the papers use, named apart from their topics
split hardware transactions · 0.2execution graph enumeration · 0.1nominal typing · 0.0metaclass programming · 0.0abelian group encoding · 0.0dependency analysis · 0.0algebraic rules · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2008 | Split hardware transactions: true nesting of transactions using best-effort hardware transactional memoryabstractTransactional Memory (TM) is on its way to becoming the programming API of choice for writing correct, concurrent, and scalable programs. Hardware TM (HTM) implementations are expected to be significantly faster than pure software TM (STM); however, full hardware support for true closed and open nested transactions is unlikely to be practical. Yossi Lev, Jan-Willem Maessen |
PPoPP | 2 |
| 2006 | Memory Model = Instruction Reordering + Store AtomicityabstractWe present a novel framework for defining memory models in terms of two properties: thread-local Instruction Reordering axioms and Store Atomicity, which describes inter-thread communication via memory. Most memory models have the store atomicity property, and it is this property that is enforced by cache coherence protocols. A memory model with Store Atomicity is serializable; there is a unique global interleaving of all operations which respects the reordering rules. Our framework uses partially ordered execution graphs; one graph represents many instruction interleavings with identical behaviors. The major contribution of this framework is a procedure for enumerating program behaviors in any memory model with Store Atomicity. Using this framework, we show that address aliasing speculation introduces new program behaviors; we argue that these new behaviors should be permitted by the memory model specification. We also show how to extend our model to capture the behavior of non-atomic memory models such as SPARC R TSO. Arvind 0001, Jan-Willem Maessen |
ISCA | 2 |
| 2004 | Object-oriented units of measurementabstractPrograms that manipulate physical quantities typically represent these quantities as raw numbers corresponding to the quantities' measurements in particular units (e.g., a length represented as a number of meters). This approach eliminates the possibility of catching errors resulting from adding or comparing quantities expressed in different units (as in the Mars Climate Orbiter error [11]), and does not support the safe comparison and addition of quantities of the same dimension. We show how to formulate dimensions and units as classes in a nominally typed object-oriented language through the use of statically typed metaclasses. Our formulation allows both parametric and inheritance poly-morphism with respect to both dimension and unit types. It also allows for integration of encapsulated measurement systems, dynamic conversion factors, declarations of scales (including nonlinear scales) with defined zeros, and nonconstant exponents on dimension types. We also show how to encapsulate most of the "magic machinery" that handles the algebraic nature of dimensions and units in a single meta-class that allows us to treat select static types as generators of a free abelian group. Eric E. Allen, David Chase, Victor Luchangco, Jan-Willem Maessen, Guy L. Steele Jr. |
OOPSLA | 4 |
| 2002 | Eager Haskell: resource-bounded execution yields efficient iterationabstractThe advantages of the Haskell programming language are rooted in its clean equational semantics. Those advantages evaporate as soon as programmers try to write simple iterative computations and discover that their code must be annotated with calls to seq in order to overcome space leaks introduced by lazy evaluation. The Eager Haskell compiler executes Haskell programs eagerly by default, i.e., bindings and function arguments are evaluated before bodies. When resource bounds are exceeded, computation falls back and is restarted lazily. By using a hybrid of eager and lazy evaluation, we preserve the semantics of Haskell and yet permit efficient iteration. Jan-Willem Maessen |
Haskell | 1 |
| 2001 | Program analysis for safety guarantees in a Java virtual machine written in JavaabstractIn this paper, we report on our experiences with guaranteeing GC-pointer safety when using unsafe low-level language extensions to implement a JVM in Java. We give an overview of the original unsafe language extensions that were defined for use by Jalapeño implementers, and introduce sanitized replacements that capture common idioms while also guaranteeing GC-pointer safety. We also outline some simple static and dynamic checks for correct usage of low-level operations, and examine how code containing low-level operations can be optimized correctly and effectively. Jan-Willem Maessen, Vivek Sarkar, David Grove |
PASTE | 1 |
| 2000 | Improving the Java memory model using CRFabstractThis paper describes alternative memory semantics for Java programs using an enriched version of the Commit/Reconcile/Fence (CRF) memory model [16]. It outlines a set of reasonable practices for safe multithreaded programming in Java. Our semantics allow a number of optimizations such as load reordering that are currently prohibited. Simple thread-local algebraic rules express the effects of optimizations at the source or bytecode level. The rules focus on reordering source-level operations; they yield a simple dependency analysis algorithm for Java. An instruction-by-instruction translation of Java memory operations into CRF operations captures thread interactions precisely. The fine-grained synchronization of CRF means the algebraic rules are easily derived from the translation. CRF can be mapped directly to a modern architecture, and is thus a suitable target for optimizing memory coherence during code generation. Jan-Willem Maessen, Arvind 0001 |
OOPSLA | 1 |
| 1996 | A Lambda Calculus with Letrecs and Barriers
Arvind 0001, Jan-Willem Maessen, Rishiyur S. Nikhil, Joseph E. Stoy |
FSTTCS | 2 |