Synchronization is one of the most challenging aspects of distributed systems in terms of their scalability. Minimal uncertainties can lead to problems or failures regarding data consistency in globally operating data centers or in distributed sensor arrays. Existing approaches to address these challenges are based on hierarchical synchronization concepts which are well understood and have reached technical maturity, but have the disadvantage of having a single point of failure. However, especially for critical infrastructure or backup more resilient solutions are required. Mutual synchronization where oscillators in a network are coupled bidirectionally without a reference have been considered. Due to the flat hierarchy such systems do not have a single point of failure. This work studies how hierarchical synchronization can be combined with architectures implementing mutual synchronization. A network of three mutually coupled 24 GHz oscillators is used to study how injecting a reference signal into one oscillator affects the dynamics. This can be quantified by analyzing in which range of frequencies the network of mutually coupled oscillators can follow the reference frequency. Measurements on a ring and chain network topology forced by an external reference oscillator shown here are in good agreement with the predictions of a nonlinear dynamical model.

The future Tactile Internet with Human in the Loop (TaHiL) [1] enables a perceived real-time interaction between a human and a remote physical or virtual object. Human intention needs to be inferred from data captured by sensors throughout the body and even the brain. Therefore, the prediction can happen already in a machine attached to the human body (or so-called a Body Computing Hub, BCH). This human-machine coaugmentation requires Tactile electronics [2] with extreme requirements, such as ultra-small, stretchable, and ultra-low-energy consumption, allowing for sensing at extremely low latency. However, for a human to interact with a real or virtual object across the globe, tactile electronics require tight integration with softwarised networks [3] , wireline or wireless, with extremely low latency. Such networks can also bring the computing capability to human’s proximity, such as a network edge, by leveraging Network Function Virtualization (NFV) and Software-Defined Networking (SDN). Even though critical, the integration between tactile electronics in a body area network (BAN) and external softwarised networks is uncovered in the literature. This paper explores vital connections between tactile electronics and fully softwarised networks, focusing on adapting all layers from electronics to network and application.

Communicating science to the public is increasingly important. Demonstrators are a valuable and established tool for communication in technology research and development. However, their role in communicating current science and technology to the public has not received much attention neither in research nor practice. This paper reflects on the design and usage of the demonstrator “Rock, Paper, Scissors”, which we developed to communicate current advances in Human-Robot Interaction to public audiences. We discuss two years of “Rock, Paper, Scissors” in action and its evolution within this period. We conclude with an outlook to future work regarding technology development and evaluation of science communication.

A 433 MHz wake-up-receiver has been designed and fabricated in 250 nm BiCMOS technology. In a novel approach, an off-chip switched SAW resonator accumulates energy from the radio wave and subsequently emits it as a voltage pulse. This mechanism delivers passive amplification and filtering of the input signal without additional power consumption. The integrated analog frontend evaluates the height of the voltage pulse in the context of on-off keying. The analog frontend circuitry draws 46 µA - 70 µA (meas.) from a 2.5 V supply. With a bitrate of 10 kbps, the energy per bit efficiency amounts to 17.4 nJ/bit without duty cycling. The active chip area measures 370 µm × 210 µm, In this implementation, a passive pulse voltage amplification of up to 24 dB and an input sensitivity of -78 dBm were measured. A detailed analysis of the switched SAW network in a realistic application shows that a passive voltage amplification of 32 dB is attainable. The functionality of the analog frontend has been verified by measurements.

This paper presents a primary impulse-radio ultra-wideband (IR-UWB) radar system for real-time short-range localization, e.g., for smart traffic and automotive applications. The radar system consisting of an integrated radar transceiver (TRx) using 45-nm SOI CMOS technology and an FPGA-based signal processing. The efficient transmitter (Tx), which complies with the regulations for both indoor and outdoor applications, modulates and emits a seventh derivative Gaussian pulse. In the receiver (Rx), echo signals will be amplified and sampled in real-time. The echo pulses are recovered by signal processing hardware on the FPGA, which is also used to perform simple classification tasks like user warning. The radar system is compact, portable, and power efficient. The Tx has a high-energy efficiency of$\mathrm {11~ \text {p} \text {J} /pulse}$. The proposed radar system achieves very high signal-to-noise ratio (SNR) and range precision. It has a maximum detection range of$\mathrm {15~m }$and a range resolution down to$\mathrm {3~ \text {cm}}$. Moreover, a target of interest can be warned with a latency as fast as$\mathrm {16~\mu s }$by using 1-bit real-time sampling.

This work presents synchronization of two bidirectionally delay-coupled phase locked loop (PLL) systems with voltage controlled oscillator frequencies of 24 GHz to validate a non-hierarchical clock distribution approach. For this purpose, a PLL architecture that allows mutual coupling between two such nodes is introduced. An existing phase domain model is extended to include the nonlinear response of the oscillator to the tuning signal. With this extension the frequencies and phase-relations of self-organized synchronized states can be precisely predicted. This is verified by measurements obtained from two synchronized PLLs for different time delays and division factors. The predictions of the model are in good agreement with the measurements. For time delays up to 14 ns it is shown that self-organized synchronization is feasible at microwave frequencies.

One important problem in code generation for embedded processors is the design of efficient compilers for target machines with application-specific architectures. This paper outlines the design of a C compiler for an industrial application-specific instruction-set processor (ASIP) for telecom applications. The target ASIP is a, network processor with special instructions for bit-level access to data registers, which is required for packet-oriented communication protocol processing. From a practical viewpoint, we describe the main challenges in exploiting these application-specific features in a C compiler and we show how a compiler backend has been designed that accommodates these features by means of compiler intrinsics and a dedicated register allocator. The compiler is fully operational and first experimental results indicate that C-level programming of the ASIP leads to good code quality without the need for time-consuming assembly programming.