EDBT 2026 Demo / reviewers in the wild / expert
Hettihe P. Dharmasena
dblp:80/4166
· DBLP profile ↗
3ranked-venue papers
3as first author
0since 2021 · last 2005
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Interconnection networks and networks-on-chip · 67% Electronic design automation · 17% Parallel and multicore computing · 15% | |
| Computer networks
1 paper |
Routing and switching · 100% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Interconnection networks and networks-on-chip › network topology › loop networks
double-loop network |
0.1 | 1 | 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop Networks · IEEE Trans. Parallel Distributed Syst. 2005 |
Interconnection networks and networks-on-chip › routing algorithms
fault-tolerant routing |
0.1 | 1 | 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop Networks · IEEE Trans. Parallel Distributed Syst. 2005 |
Interconnection networks and networks-on-chip
network topology |
0.1 | 1 | 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop Networks · IEEE Trans. Parallel Distributed Syst. 2005 |
Electronic design automation › physical design
routing |
0.1 | 1 | 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop Networks · IEEE Trans. Parallel Distributed Syst. 2005 |
Interconnection networks and networks-on-chip › bus-based interconnection
multiple bus network |
0.0 | 1 | 2004 | Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms · IEEE Trans. Computers 2004 |
Parallel and multicore computing › parallel algorithms
parallel algorithm analysis |
0.0 | 1 | 2004 | Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree Algorithms · IEEE Trans. Computers 2004 |
Routing and switching › routing
message routing |
0.0 | 1 | 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop Networks · IEEE Trans. Parallel Distributed Syst. 2005 |
Routing and switching › routing algorithms
optimal routing |
0.0 | 1 | 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop Networks · IEEE Trans. Parallel Distributed Syst. 2005 |
Methods — techniques the papers use, named apart from their topics
table-free routing · 0.1constant-time routing · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | An Optimal Fault-Tolerant Routing Algorithm for Weighted Bidirectional Double-Loop NetworksabstractDouble-loop networks are widely used in computer networks. In this paper, we present an optimal message routing algorithm and an optimal fault-tolerant message routing algorithm for weighted bidirectional double-loop networks. The algorithms presented are novel, and they do not use routing tables. After a precalculation of O(log N) steps to determine network parameters, the algorithms can route messages using constant time at each node along the route. The algorithm presented can route messages in the presence of up to three faulty nodes or links. The fault-tolerant routing algorithm guarantees an optimal route in the presence of one node failure. Hettihe P. Dharmasena |
IEEE Trans. Parallel Distributed Syst. | 1 |
| 2004 | Lower Bounds on the Loading of Multiple Bus Networks for Binary Tree AlgorithmsabstractA multiple bus network (MBN) connects a set of processors via set of buses. Two important parameters of an MBN are its loading (largest number of connections on a bus) and its degree (largest number of connections to a processor). These parameters determine the cost, speed, and implementability of the MBN. The smallest degree that any useful MBN can have is 2. In this paper, we study the relationship between running time, degree, and loading of degree-2 MBNs running a fundamental class of algorithms called binary tree algorithms. (A binary tree algorithm reduces 2/sup n/ inputs at the leaves of a balanced-binary tree to a single result at the root of the tree.) Specifically, we establish a nontrivial /spl Omega/(n/logn) loading lower bound for any degree-2 MBN running a 2/sup n/ input binary tree algorithm optimally in n steps. We show that this bound does not hold if the restriction on the degree or the running time is relaxed. That is, optimal-time, degree-3, constant loading MBNs and suboptimal-time, degree-2, constant loading MBNs exist for binary tree algorithms. We also derive a lower bound on the additional time (beyond the optimal) needed to run binary tree algorithms on a degree-2, loading-L MBN, for any L>3. Hettihe P. Dharmasena, Ramachandran Vaidyanathan |
IEEE Trans. Computers | 1 |
| 1997 | An Optimal Multiple Bus Network for Fan-in AlgorithmsabstractWe consider a class of algorithms called fan-in algorithms, with numerous applications in problems involving semigroup operations. We present a multiple bus network (MBN) that runs any fan-in algorithm in optimal number of steps. The degree and loading of this MBN are each 3. We prove that the product of the degree and loading of any MBN that runs a fan-in algorithm in optimal time is at least 9. This establishes the proposed MBN to be optimal. Hettihe P. Dharmasena, Ramachandran Vaidyanathan |
ICPP | 1 |