Demo Data from EDBT 2026 / reviewers in the wild / expert
George J. Milne
dblp:80/4409
· DBLP profile ↗
12ranked-venue papers
7as first author
0since 2021 · last 2005
0000-0002-9796-0600ORCID · reported
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 5 first-authorSoftware engineering, systems software and programming languages · 3 · 1 first-authorTheory of computation · 2Computer networks · 1Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 100% | |
| Software engineering, system software, and programming languages
2 papers |
Concurrent programming · 57% Programming languages and type systems · 43% | |
| Theoretical computer science
3 papers |
Automated reasoning and model checking · 95% Logic in computer science · 5% |
Topics — the 11 heaviest of 11, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation
hardware verification and test |
0.0 | 1 | 1991 | The Formal Description and Verification of Hardware Timing · IEEE Trans. Computers 1991 |
Electronic design automation › hardware verification and test
timing verification |
0.0 | 1 | 1991 | The Formal Description and Verification of Hardware Timing · IEEE Trans. Computers 1991 |
Automated reasoning and model checking › program verification
verification of concurrent systems |
0.0 | 1 | 1991 | The Formal Description and Verification of Hardware Timing · IEEE Trans. Computers 1991 |
Concurrent programming › concurrency theory
process calculi |
0.0 | 2 | 1985 | Circal and the Representation of Communication, Concurrency, and Time · ACM Trans. Program. Lang. Syst. 1985 Concurrent Processes and Their Syntax · J. ACM 1979 |
Concurrent programming
concurrency semantics |
0.0 | 1 | 1985 | Circal and the Representation of Communication, Concurrency, and Time · ACM Trans. Program. Lang. Syst. 1985 |
Programming languages and type systems › language semantics › formal semantics
operational semantics |
0.0 | 1 | 1985 | Circal and the Representation of Communication, Concurrency, and Time · ACM Trans. Program. Lang. Syst. 1985 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 1984 | A model for hardware description and verification · DAC 1984 |
Programming languages and type systems
language semantics |
0.0 | 1 | 1979 | Concurrent Processes and Their Syntax · J. ACM 1979 |
Programming languages and type systems › language semantics › behavioral semantics
process semantics |
0.0 | 1 | 1979 | Concurrent Processes and Their Syntax · J. ACM 1979 |
Automated reasoning and model checking
abstraction |
0.0 | 1 | 1985 | Circal and the Representation of Communication, Concurrency, and Time · ACM Trans. Program. Lang. Syst. 1985 |
Logic in computer science
domain theory |
0.0 | 1 | 1979 | Concurrent Processes and Their Syntax · J. ACM 1979 |
Methods — techniques the papers use, named apart from their topics
finite state machine composition · 0.0CIRCAL · 0.0acceptance semantics · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2005 | Properties as Processes: Their Specification and Verification
Joel Kelso, George J. Milne |
FORTE | 2 |
| 2003 | Building Run-Time Reconfigurable Systems from Tiles
Gareth Lee, George J. Milne |
FPL | 2 |
| 2002 | A methodology for design of run-time reconfigurable systemsabstractField-programmable logic (FPL) is rapidly becoming established in markets requiring high-performance, low lead time and the ability to perform soft-upgrades on site. However few current FPL systems utilise run-time reconfiguration (RTR) and those that do rely on infrequent and coarse-grained reconfiguration. This is partly due to poor support from current FPGAs; few devices allow random access to individual configurable logic blocks. But we believe it also partly reflects the fact that designers of reconfigurable computing systems lack methodologies and tools to guide the design process. In software engineering there are well established paradigms for the design of reconfigurable systems, such as object orientation (OO) and for the modelling and description of systems, such as UML. This paper describes our progress towards a component-based methodology for application to RTR. We have preserved useful OO properties which support a rigorous, modular design style. Gareth Lee, George J. Milne |
FPT | 2 |
| 2000 | A Methodology for the Formal Analysis of Asynchronous Micropipelines
Antonio Cerone, George J. Milne |
FMCAD | 2 |
| 1997 | Reconfigurable custom computing as a supercomputer replacementabstractReconfigurable computers are a new class of customisable computers constructed using field programmable gate arrays (FPGAs). They offer us the potential for supercomputing performance at high-end workstation costs for a range of niche applications. The performance achievable is a direct consequence of the machine architecture which gives the user direct exposure to the inherent parallelism present in the underlying FPGA circuits, in contrast to classical, sequential, von Neumann architectures. FPGAs are reprogrammable so giving reconfigurable computers the unique combination of software-like reprogrammability with custom hardware performance. George J. Milne |
HiPC | 1 |
| 1994 | An Exercise in the Automatic Verification of Asynchronous Designs
Andrew M. Bailey, George Alexander McCaskill, George J. Milne |
Formal Methods Syst. Des. | 3 |
| 1991 | The Formal Description and Verification of Hardware TimingabstractA formalism in which timing properties of digital hardware may be specified, derived, and formally verified is introduced as a rigorous theory for hardware timing. A rigorous modeling framework has been used to create a family of related verification techniques rather than a single timing analysis tool. This framework is based on a model of interacting finite state machines called CIRCAL, a formalism developed for the purpose of describing and validating complex concurrent systems. In this approach to hardware timing analysis, the presence of a composition operator is all-pervasive. It provides a single, uniform mechanism for describing the behavior of interacting hardware modules and for establishing and describing the timing properties of such modules.> George J. Milne |
IEEE Trans. Computers | 1 |
| 1985 | Circal and the Representation of Communication, Concurrency, and TimeabstractThe CIRCAL calculus is presented as a mathematical framework in which to describe and analyze concurrent systems, whether hardware or software. The dot operator is used to compose CIRCAL descriptions, and it is this operator which permits the natural modeling of asynchronous and simultaneous behavior, thus allowing the representation and analysis of system timing properties such as those found in circuits. The CIRCAL framework uses an abstraction operator to permit the modeling of a system at different levels of detail. Behavioral complexity of real systems makes abstraction crucial when producing a tractable model, and we illustrate how abstraction introduces nondeterminisim into system representations. An operational semantics, acceptance semantics, is introduced, and it is in terms of this active experimentation that meaning is given to the CIRCAL syntax, thus allowing proof of system properties to be constructed. George J. Milne |
ACM Trans. Program. Lang. Syst. | 1 |
| 1984 | A model for hardware description and verification
George J. Milne |
DAC | 1 |
| 1983 | Circal: A calculus for circuit description
George J. Milne |
Integr. | 1 |
| 1982 | Abstraction and Nondeterminism in Concurrent Systems
George J. Milne |
ICDCS | 1 |
| 1979 | Concurrent Processes and Their SyntaxabstractA mathemaucal model of concurrent computaUon is presented Starting from synchronized com-mumcaUon as the only pnmitwe notion, a process is defined as a set of communication capabdmes The domain of processes is budt using the weak powerdomam construction of Smyth, which evolved from that of Plotkm A minimal set of operaUons for composing processes is defined These operations suggest a corresponding mmlmal syntax--the language offlowgraphs--m which to specify these composluons The concept offlow algebra is defined, processes and flowgraphs are examples of flow algebras Elsewhere it will be shown that flowgraphs are free (over a set of generators) in the category of flow algebras, here it is shown that processes are a flow algebra, and therefore constitute a suitable semantics for flowgraphs However, we emphasize that the nouon of flowgraph evolved from the notion of process and not the reverse George J. Milne, Robin Milner |
J. ACM | 1 |