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Werner Fleischhammer

dblp:80/5565 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1979
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 75% Distributed systems · 25%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design
0.011979
The Anomalous Behavior of Flip-Flops in Synchronizer Circuits · IEEE Trans. Computers 1979
Distributed systems
fault tolerance
0.011979
The Anomalous Behavior of Flip-Flops in Synchronizer Circuits · IEEE Trans. Computers 1979
Integrated circuit design › digital circuit design › sequential circuit design
flip-flop
0.011979
The Anomalous Behavior of Flip-Flops in Synchronizer Circuits · IEEE Trans. Computers 1979
Integrated circuit design
synchronizer circuits
0.011979
The Anomalous Behavior of Flip-Flops in Synchronizer Circuits · IEEE Trans. Computers 1979

Methods — techniques the papers use, named apart from their topics

failure rate analysis · 0.0circuit measurement · 0.0
YearPublicationVenuePosition
1979 The Anomalous Behavior of Flip-Flops in Synchronizer Circuits
abstract
Quantitative results of the observations of oscillatory and metastable behavior of common flip-flops in response to logically undefined input conditions, such as those that occur in synchronizers and arbiters, are presented. The results are obtained with the help of a circuit developed for this purpose which measures the failure rate for a certain flip-flop and frequency. It is found that the obtained results are in good correlation with observed failure rates of a synchronizer with both short and long flip-flop resolution times allowed.
Werner Fleischhammer, Osman Dörtok
IEEE Trans. Computers1