Low-latency and low-power edge AI is crucial for Augmented/Virtual Reality applications. Recent advances demonstrate that hybrid models, combining convolution layers (CNN) and transformers (ViT), often achieve a superior accuracy/performance tradeoff on various computer vision and machine learning (ML) tasks. However, hybrid ML models can present system challenges for latency and energy efficiency due to their diverse nature in dataflow and memory access patterns. In this work, we leverage architecture heterogeneity from Neural Processing Units (NPU) and Compute-In-Memory (CIM) and explore diverse execution schemas for efficient hybrid model executions. We introduce H4H-NAS, a two-stage Neural Architecture Search (NAS) framework to automate the design of hybrid CNN/ViT models for heterogeneous edge systems featuring both NPU and CIM. We propose a two-phase incremental supernet training in our NAS to resolve gradient conflicts between sampled subnets caused by different block types in a hybrid model search space. Our H4H-NAS approach is also powered by a performance estimator built with NPU performance results measured on real silicon, and CIM performance based on industry IPs. H4H-NAS searches hybrid CNN-ViT models with fine granularity and achieves significant (up to 1.34%) top-1 accuracy improvement on ImageNet-1k. Moreover, results from our algorithm/hardware co-design reveal up to 56.08% overall latency and 41.72% energy improvements by introducing heterogeneous computing over baseline solutions. Overall, our framework guides the design of hybrid network architectures and system architectures for NPU+CIM heterogeneous systems.

Strong physical unclonable functions (PUFs) provide a low-cost authentication primitive for resource-constrained devices. However, most strong PUF architectures can be modeled through learning algorithms with a limited number of CRPs. In this article, we introduce the concept of nonmonotonic response quantization for strong PUFs. Responses depend not only on which path is faster but also on the distance between the arriving signals. Our experiments show that the resulting PUF has increased security against learning attacks. To demonstrate, we designed and implemented a nonmonotonically quantized ring oscillator-based PUF in 65-nm technology. Measurement results show nearly ideal uniformity and uniqueness with a bit error rate of 13.4% over the temperature range from 0 °C to 50 °C.

Secret keys can be extracted from the power consumption or electromagnetic emanations of unprotected devices. Traditional countermeasures have a limited scope of protection and impose several restrictions on how sensitive data must be manipulated. We demonstrate a bit-serial RISC-V microprocessor implementation with no plain-text data. All values are protected using Boolean masking. Software can run with little to no countermeasures, reducing code size and performance overheads. Unlike previous literature, our methodology is fully automated and can be applied to designs of arbitrary size or complexity. We also provide details on other key components, such as clock randomizer, memory protection, and random number generator (RNG). The microprocessor was implemented in 65-nm CMOS technology. Its implementation was evaluated using NIST tests and side-channel attacks. Random numbers generated with our RNG pass on all NIST tests. The side-channel analysis on the baseline implementation extracted the advanced encryption system (AES) key using only 375 traces, while our secure microprocessor was able to withstand attacks using 20M traces.

This paper presents a new hardware-based approach able to monitor the execution flow of the Real-Time Operating System (RTOS) in order to detect faults changing the tasks' execution flow in embedded systems. Results obtained during experiments performed according to the IEC 61000-4-29 standard demonstrate that the proposed approach is able to provide higher fault coverage with respect to the fault detection mechanisms natively provided by the RTOS.

OWD is becoming increasingly important nowadays, as SLA agreements use it as a parameter to ensure QoS levels. However, its measurement is still a much debated topic due to the difficulty in the clock synchronization process. The paper approaches a new methodology to measure OWD, using NTP protocol with virtual clocks and bigger packets. This approach works over a measurement tool developed by the authors, called Netmetric, and is flexible enough to be applied in full-mesh networks, without lack in clock consistency during concurrent NTP synchronizations. The proposed method was validated using NTCUns simulator, tested over Vivo/Telefonica's 3G Network, and compared to OWAMP.