A method to analyze first-order spatial properties of optical flow is proposed. The approach is based on the use of a set of linear models that dynamically adjust their properties on the basis of context information. These models are generated by a recursive network that takes into account spatial interaction between neighbors. By checking the presence of these models in the optic flow using a multiple model Kalman Filter it is possible to recover information about the coefficients of the affine description and the image motion invariants: divergence, curl and deformation. Reliable estimates of these quantities could help in the analysis of real world complex motion sequences. Experimental results on egomotion estimation and 3D surface reconstruction validate the approach. 1

A perceptual human-machine interface based on visual appearance of hand movements is presented. Gestures are defined as the temporal evolution of 3D poses the of user's hand. Each gesture is described by five temporal sequences corresponding to the time evolution of the stereo depth information at the finger-tips. To this end feature processing directly exploits binocular disparity information considered in its full spatio-temporal dimension. Hidden Markov models are used to represent the statistical properties of the gesture. The high recognition rate obtained by experimental testing on a five gesture alphabet validates the approach.

A cortical model for motion-in-depth selectivity of complex cells in the visual cortex is proposed. The model is based on a time ex(cid:173) tension of the phase-based techniques for disparity estimation. We consider the computation of the total temporal derivative of the time-varying disparity through the combination of the responses of disparity energy units. To take into account the physiological plau(cid:173) sibility, the model is based on the combinations of binocular cells characterized by different ocular dominance indices. The resulting cortical units of the model show a sharp selectivity for motion-in(cid:173) depth that has been compared with that reported in the literature for real cortical cells.

A variety of computational tasks in early vision can be formulated through lattice networks. The cooperative action of these networks depends on the topology of interconnections, both feedforward and recurrent ones. This paper shows that it is possible to consider a distinct general architectural solution for all recurrent computations of any given order. The Gabor-like impulse response of a second-order network is analyzed in detail, pointing out how a near-optimal filtering behavior in space and frequency domains can be achieved through excitatory/inhibitory interactions without impairing the stability of the system. These architectures can be mapped, very efficiently at transistor level, on very large scale integration (VLSI) structures operating as analog perceptual engines. The problem of hardware implementation of early vision tasks can, indeed, be tackled by combining these perceptual agents through suitable weighted sums. A 17-node analog current-mode VLSI circuit has been implemented on a CMOS 2 microm, NWELL, single-poly, and double-metal technology, to demonstrate the feasibility of the approach. Applications of the perceptual engine to various machine vision algorithms are proposed.

The spatial organization of cortical axon and dendritic fields could be an interesting structural paradigm to obtain a functional specificity without postulating highly specific feedforward connections. In this article, we investigate the functional implications of recurrent intracortical inhibition when it occurs through clustered medium-range interconnection schemes (Wörgötter & Koch, 1991; Somogyi, 1989; Kritzer, Cowey, & Somogyi, 1992). Moreover, the interaction between the inhibitory schemes and visual orientation maps is explored. Assuming linearity, we show that clustered inhibitory mechanisms can trigger a propagation process that allows the development of extra (i.e., induced) interactions among the cortical sites involved in the recurrent loops. In addition, we point out how these interactions functionally modify the response of cortical simple cells and yield to highly structured Gabor-like receptive fields. This study should be considered not as a realistic biological model of the primary visual cortex but as an attempt to explain possible computational principles related to intracortical connectivity and to the underlying single-cell properties.

We consider the design process of VLSI systems dedicated to the real-time implementation of cooperative algorithms whose functionalities can be characterized by multilayer ensembles of simple elements which interact locally. These algorithms are related, even though not exclusively, to the implementation of various tasks in low-level machine vision. The starting point in the design process is the formulation of the sequential algorithm that computes the behavior of the system. Algorithmic transformations are performed to expose the parallelism originally present in the task. Given the description in terms of parallel loops, we partition the system and organize it as a set of processing units. The architectural structure of these units takes properly into account the algorithmic constraints on precision both in data representation and computation. The program flow implemented by our programmable architectural solution (ASIP) is an iterative sequence of multiply-and-accumulate operations performed in parallel. The programmability concerns both the structure/coefficients of the algorithm-depending on the specific application-and its computational parameters. The architecture's main blocks are described in VHDL and synthesized as a semi-custom chip, using standard tools. Following this procedure, we designed an ASIP core for performing real-time texture-based image segregation.

A symbolic cell generator (SYC) that can generate the symbolic layout of a generic CMOS logic cell is presented. It accepts as input a SPICE-like netlist describing circuit components, connectivity, and the list of the I/O pins. Using this generator, the user can specify topological constraints on pin and transistor positions, the maximum lengths of polysilicon and diffusion wires, and a preferred layer for each electrical node. Cells are generated according to optimization criteria that take into account not only geometric factors, such as cell area, aspect ratio, and wirelength, but also electrical features, namely capacitance to the substrate and contact and via minimization. The generator's placement strategy includes transistor clustering into regions, global region placement by linear ordering, and two-dimensional local transistor placement. The routing combines Steiner trees and Lee algorithms. Object-oriented programming paradigms were used in the implementation of the program, written in C++ language. Experimental results for small and medium-sized cells are presented.>

An architectural configuration for the back-propagation (BP) algorithm is illustrated. The circuit solution for the basic blocks is presented, and the effect of weight discretization on the BP algorithm is analyzed. It is demonstrated, through simulations, how the BP algorithm can be operated successfully with discretized weights. In particular, better performances can be achieved with an exponential discretization, i.e. the strength of weights varies exponentially with the controlling variable (voltage). The discretized voltage values differ by a quantity high enough that the neural network can be backed up with a refresh technique in combination with a multilevel dynamic memory that entails a particularly low wiring cost. A quasi-analog adaptive architecture is devised, properly matching the BP algorithm, and its CMOS circuit implementation is detailed. The mechanism controlling weight changes is simple enough to be reproduced locally at each synapsis site, thus meeting one of the requirements for an efficient storage technology for analog VLSI

The problem of the efficient simulation of neural networks on parallel machines is addressed. First, the computationally most efficient neural algorithms capturing the functionality of the network are searched for. Then their implementations on a given concurrent machine (a transputer array programmed in Occam) is presented and discussed. Single-layer networks, described by the additive, or Hopfield, model are considered. Results of the solution of optimization problems (analog/digital conversion and the traveling salesman problem) are given.>

A general methodology, based on the concept of folding, for mapping wavefront algorithms into processor square meshes of fixed size has been implemented on a mesh of INMOS transputers, programmed in OCCAM, for the multiplication of matrices of arbitrary size. Different implementations of the code are considered and compared. The computational costs are analyzed in detail. The method and the performances of the system used are compared with other more standard solutions.>