Demo Data from EDBT 2026 / reviewers in the wild / expert
Nobuo Mutoh
dblp:81/4254
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 1997
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 1Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware reliability and fault tolerance · 50% Electronic design automation · 50% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test › design for testability
built-in self-test |
0.0 | 1 | 1984 | A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing · IEEE Trans. Computers 1984 |
Hardware reliability and fault tolerance
error detection and correction |
0.0 | 1 | 1984 | A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing · IEEE Trans. Computers 1984 |
Electronic design automation
hardware verification and test |
0.0 | 1 | 1984 | A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing · IEEE Trans. Computers 1984 |
Hardware reliability and fault tolerance › error detection and correction
self-checking checker |
0.0 | 1 | 1984 | A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In Testing · IEEE Trans. Computers 1984 |
Methods — techniques the papers use, named apart from their topics
self-testing checker · 0.0group parity prediction · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1997 | An Intelligent Directory-Assistance System Using Natural Language Processing and MappingabstractA telephone directory assistance system has been developed that uses natural language processing and mapping to reduce the time an operator spends looking for requested information. Its address analysis function has an average response time of 0.15 s with 99% accuracy. Its map guidance function has a response time of about 3 s for 100 KB of map data. Its search expansion function decreases operator's keying. Using this system, operators spend an average of 20% less time searching for information. Hideki Kawabe, Yoshimi Fukumura, Nobuo Mutoh, Hiroaki Karasawa, Shigehito Iwase |
ICTAI | 3 |
| 1984 | A Self-Testing Group-Parity Prediction Checker and Its Use for Built-In TestingabstractThis correspondence demonstrates a new kind of error-checking scheme for multioutput combinational circuits and its use for a built-in testing method. In the error-checking logic employed, the output from the circuits being checked is partitioned into several groups. The predicted group parity is compared to that produced from the output in each group. This checking circuit, called a group-parity prediction (GPP) checker, can be implemented systematically. To ensure that the GPP checker is self-testing, several conditions are required. The self-testing GPP checkers are implemented for some concrete examples of multioutput combinational circuits. With respect to these examples, the self-testing GPP checker shows 87-100 percent error detection ability, and 91-100 percent fault coverage for single stuck faults. Using this self-testing GPP checker, a self-verification testing method, which takes advantage of the automatic fault-detection capability of a checker, is shown to be applicable to testing combinational circuits. Eiji Fujiwara, Nobuo Mutoh, Kohji Matsuoka |
IEEE Trans. Computers | 2 |