Demo Data from EDBT 2026 / reviewers in the wild / expert
Srinagesh Satyanarayana
dblp:81/4842
· DBLP profile ↗
4ranked-venue papers
3as first author
0since 2021 · last 1996
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Artificial intelligence and machine learning · 3 · 2 first-authorGraphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Hardware accelerators and domain-specific architectures · 49% Integrated circuit design · 27% Emerging computing paradigms · 17% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
analog and mixed-signal circuits |
0.0 | 2 | 1989 | A Reconfigurable Analog VLSI Neural Network Chip · NIPS 1989 Stochastic Learning Networks and their Electronic Implementation · NIPS 1987 |
Hardware accelerators and domain-specific architectures › machine learning accelerator › neural network accelerator
analog VLSI neural network |
0.0 | 1 | 1989 | A Reconfigurable Analog VLSI Neural Network Chip · NIPS 1989 |
Hardware accelerators and domain-specific architectures › machine learning accelerator
neural network accelerator |
0.0 | 1 | 1989 | A Reconfigurable Analog VLSI Neural Network Chip · NIPS 1989 |
Emerging computing paradigms
neuromorphic computing |
0.0 | 1 | 1987 | Stochastic Learning Networks and their Electronic Implementation · NIPS 1987 |
Reconfigurable computing and FPGAs
reconfigurable architecture |
0.0 | 1 | 1989 | A Reconfigurable Analog VLSI Neural Network Chip · NIPS 1989 |
Hardware accelerators and domain-specific architectures
neural network implementation |
0.0 | 1 | 1987 | Stochastic Learning Networks and their Electronic Implementation · NIPS 1987 |
Methods — techniques the papers use, named apart from their topics
stochastic learning · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1996 | Video color enhancement using neural networksabstractTelevision pictures are not always at their best color saturation settings. We propose an intelligent system that automatically adjusts the color saturation on a field-by-field basis. Incoming pictures are first classified into one of two categories, namely, facial tone and nonfacial tone images, then each category is subcategorized. Depending on the membership of the picture to each subcategory, color saturation changes are computed and used to modify the color saturation of the following field. The categorization is done by using neural network classifiers operating on the color difference signals. We describe the principles of the color correction scheme, its implementation using analog hardware and its interface to a television. Performance of the color adjustment technique implemented using real-time hardware in a television is discussed. Oversaturated and under-saturated pictures in both facial and nonfacial tone categories can be detected and corrected. The technique lends itself to low-cost analog implementations. Srinagesh Satyanarayana, Sandeep Dalal |
IEEE Trans. Circuits Syst. Video Technol. | 1 |
| 1989 | A Reconfigurable Analog VLSI Neural Network Chip
Srinagesh Satyanarayana, Yannis P. Tsividis, Hans Peter Graf |
NIPS | 1 |
| 1988 | Analog MOS circuit techniques in the VLSI implementation of neural networks
Srinagesh Satyanarayana, Ken Suyama, Yannis P. Tsividis |
Neural Networks | 1 |
| 1987 | Stochastic Learning Networks and their Electronic Implementation
Joshua Alspector, Robert B. Allen, Victor Hu, Srinagesh Satyanarayana |
NIPS | 4 |