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Enrico Dallago

dblp:81/5540 · DBLP profile ↗
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8ranked-venue papers
2as first author
0since 2021 · last 2016
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 8 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 67% Electronic design automation · 33%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
circuit simulation
0.011990
A circuit-level simulation model of PNPN devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1990
Integrated circuit design › analog and mixed-signal circuits › device modeling
device model implementation
0.011990
A circuit-level simulation model of PNPN devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1990
Integrated circuit design
semiconductor device modeling
0.011990
A circuit-level simulation model of PNPN devices · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1990

Methods — techniques the papers use, named apart from their topics

numerical simulation · 0.0ebers-moll equations · 0.0
YearPublicationVenuePosition
2016 Magnetic field analysis for the optimization of a GMR isolator for data transmission in power applications
abstract
A finite element magnetic field analysis of an isolator that exploits giant magnetoresistances, GMRs, as sensing elements is presented. The isolator basically consists of a coil, which generates a magnetic field (MF) when driven by a bias current, and at least two GMR elements, which vary their resistance depending on the MF intensity. This kind of isolator can be used to realize a structure that can be monolithically integrated by means of a suitable IC manufacturing process, thus allowing data transmission from high voltage parts to the low voltage front-end on the same chip. In this work the structure is analyzed as a function of different design parameters with the goal of obtaining an optimized structure where silicon area occupation and current consumption represent the two main constraints. The isolator geometry is first described, then the implemented finite element model is introduced. Simulation results obtained varying the number of coil turns, the excitation current intensity and the silicon area occupied are reported and discussed.
Alessandro Liberale, Alessandro Cabrini, Enrico Dallago, Maria Evelina Mognaschi
IECON3
2008 Active self supplied AC-DC converter for piezoelectric energy scavenging systems with supply independent bias
abstract
The paper focuses on an electronic interface which can be used into piezoelectric energy scavenging systems (PESS). These systems convert the energy of mechanical vibrations into electrical energy using a piezoelectric transducer to realize a power supply for low power electronic systems. To obtain a suitable supply source an AC-DC conversion of the output signal of these transducers is needed and, since the output power level of the energy scavenger can be very low, the conversion should be as efficient as possible. This paper shows an active voltage doubler AC-DC converter for PESSs. A novel driving circuitry topology is presented; it has the advantage to be tolerant with respect to the process variations. The converter uses exclusively a fraction of the harvested energy to supply itself and a bias circuit has been designed to make the total current consumption supply independent. The simulation results show that the efficiency of the AC-DC converter can be as high as 94%. The circuit will be diffused in 0.35 mum CMOS STMicroelectronics technology.
Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Valeria Bottarel, Giovanni Frattini, Giulio Ricotti, Monica Schipani
ISCAS1
2008 An offset compensation technique for bandgap voltage reference in CMOS technology
abstract
A precision integrated bandgap voltage reference in 0.35 mum CMOS technology is here presented. The circuit uses natural npn bipolar transistors as reference diodes. A particular attention was paid to the compensation of the several offsets that could strongly influence the performances of the reference. A very simple sample and hold technique for offset compensation is here presented. The proposed technique is straight forward for all bandgap topologies which use diodes with a terminal connected to the ground node or to the supply node. The temperature coefficient (TC) of the generated output voltage is 12.7 ppm/degC versus about 245 ppm/degC of the same circuit without offset compensation. A full description and an analytical expression for the proposed compensation technique are given. The results of the most relevant simulations are also reported. The circuit has been inserted in a test chip whose layout is shown.
Stefano Ruzza, Enrico Dallago, Giuseppe Venchi, Sergio Morini
ISCAS2
2007 Self-Supplied Integrable Active High-Efficiency AC-DC Converter for Piezoelectric Energy Scavenging Systems
abstract
In recent years a lot of studies focused on Energy-Scavenging Systems (ESS). An important motivation for these studies is the development of Portable Devices (PD) and of Wireless Sensor Networks (WSN). An ESS can be partitioned in two sections: the energy-scavenger itself and the electronic interface. The first one is the energy transducer while the second one is the electronic circuit which manages the energy. One of the most important objectives of the electronic interface is to realize the required ac-dc conversion. Since the output power level of the energy-scavenger can be very low, the conversion should be as efficient as possible. The goal of this paper is to design an active, high efficiency voltage doubler ac-dc converter for piezoelectric ESS which exclusively uses a fraction of the harvested energy to supply its active devices. The circuit was diffused in 0.35μm BCD6s technology. The simulation results show that it is possible to obtain a maximum efficiency of the ac-dc converter equal to 91%. Premiliminary experimental measurements were performed and the results obtained are in good agreement with simulations.
Enrico Dallago, Daniele Miatton, Giuseppe Venchi, Giovanni Frattini, Giulio Ricotti
ISCAS1
2006 A CMOS front-end circuit for integrated fluxgate magnetic sensors
abstract
In this paper an integrated CMOS front-end circuit for a micro-integrated fluxgate magnetometer is proposed. The system is based on excitation block, that feeds the excitation coil of the sensor and a read-out block that sense the voltage of the pick-up coils. To sense the output signal, the second harmonic detection principle has been chosen to achieve a good compromise between power consumption and noise requirements. An integrated low pass Sallen-Key filter has been used to extract the dc signal after the demodulation. The preliminary measurements, performed with a PCB sensor, show a sensitivity of 920 V/T and a linearity error of 6% full scale. The circuit has been realized in a standard 0.35 mum CMOS process. The power consumption is 8 mW @ 3.3V for the excitation and read-out parts and unit and 42 mW @ 5V for the output power stage
Andrea Baschirotto, Fausto Borghetti, Enrico Dallago, Piero Malcovati, Marco Marchesi, Giuseppe Venchi
ISCAS3
1993 Steady state simulation of electrical circuits
Angelo Maurizio Brambilla, Enrico Dallago
ISCAS2
1993 A method for the simulation of switching DC-DC power supplies
Angelo Maurizio Brambilla, Enrico Dallago
ISCAS2
1990 A circuit-level simulation model of PNPN devices
abstract
A numerical model of a three-junction device is presented. It allows the simulation of the external characteristics of the PNPN family devices, and in this work the simulation of the gate turn-off thyristor is particularly considered. The reasons that led to the realization of this model are explained by reviewing previous works in this area. The model is based on the Ebers-Moll equations extended to include the three-junction devices, and it is implemented (built-up) in the source code of the SPICE2 circuit simulator. A detailed description of the implementation of the model equations and different tests are reported and discussed. The results are in accordance with the measurements from the devices reported on data sheets and the computation time is sufficiently short.>
Angelo Maurizio Brambilla, Enrico Dallago
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2