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Yeong-Dae Kim

dblp:81/612 · DBLP profile ↗
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5ranked-venue papers
2as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 4 · 2 first-authorSystems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%
Artificial intelligence
1 paper
Planning, search and constraint satisfaction · 77% Multi-agent systems · 23%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › physical design
floorplanning
0.012003
A linear programming-based algorithm for floorplanning in VLSI design · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2003
Electronic design automation
physical design
0.012003
A linear programming-based algorithm for floorplanning in VLSI design · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2003
Knowledge, reasoning and agents › Planning, search and constraint satisfaction › scheduling
production scheduling
0.011999
Heuristics for a tool provisioning problem in a flexible manufacturing system with an automatic tool transporter · IEEE Trans. Robotics Autom. 1999
Knowledge, reasoning and agents › Multi-agent systems
flexible manufacturing systems
0.011999
Heuristics for a tool provisioning problem in a flexible manufacturing system with an automatic tool transporter · IEEE Trans. Robotics Autom. 1999

Methods — techniques the papers use, named apart from their topics

simulated annealing · 0.0sequence-pair representation · 0.0linear programming · 0.0simulation-based search · 0.0greedy search · 0.0
YearPublicationVenuePosition
2010 Hierarchical Production Planning for Semiconductor Wafer Fabrication Based on Linear Programming and Discrete-Event Simulation
abstract
This paper focuses on a production planning and scheduling problem in a semiconductor wafer fabrication facility. We propose a two-level hierarchical production planning (HPP) method that employs an itmmerative procedure for production planning and operations scheduling. In the method, production plans are obtained with a linear programming (LP) model in the aggregate level, and schedules at the machines are obtained with a priority-rule-based scheduling method and evaluated with discrete-event simulation in the disaggregate level. An iterative scheme is adopted for obtaining a good and feasible production plan. The proposed method is evaluated through simulation experiments and the results show that the method works better than an existing algorithm in terms of the total production cost and total tardiness of orders.
June-Young Bang, Yeong-Dae Kim
IEEE Trans Autom. Sci. Eng.2
2003 A linear programming-based algorithm for floorplanning in VLSI design
abstract
In this paper, we consider a floorplanning problem in the physical design of very large scale integration. We focus on the problem of placing a set of blocks (modules) on a chip with the objective of minimizing area of the chip as well as total wire length. The blocks have different areas and their shapes are either fixed (predetermined) or flexible (to be determined). We use the sequence-pair suggested by Murata et al. (see ibid, vol.15, no.12, p.1518-1524, 1996) to represent the topology of nonslicing floorplans and present two methods to obtain a floorplan from a sequence-pair. One is a construction method, and the other is a method based on a linear programming model. The two methods are embedded in simulated annealing algorithms, which are used to find a near optimal floorplan. Results of computational experiments on the Microelectronics Center of North Carolina benchmark examples show that the proposed algorithms work better than existing algorithms.
Jae-Gon Kim, Yeong-Dae Kim
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2001 Production scheduling in a semiconductor wafer fabrication facility producing multiple product types with distinct due dates
abstract
Focuses on production scheduling in a semiconductor wafer fab producing multiple product types that have different due dates and different process flows. In the wafer fab, wafer lots are processed on serial and batch processing workstations, each of which consists of parallel identical machines. Machines in serial processing workstations process wafer lots one by one, while those in batch processing workstations process several wafer lots of the same recipe at the same time. What needs to be done for production scheduling are lot release control, lot scheduling, and batch scheduling. For these three decision problems, we develop several rules which use information such as order sizes (numbers of lots in orders) and processing status of the wafer lots. To evaluate these new rules, we use a simulation model in which the three decision problems are considered simultaneously. Simulation results show that the new rules work better than existing rules in terms of total tardiness of the orders.
Yeong-Dae Kim, Jae-Gon Kim, Bum Choi, Hyung-Un Kim
IEEE Trans. Robotics Autom.1
2001 Tool requirements planning in a flexible manufacturing system with an automatic tool transporter
abstract
We consider a tool requirements planning problem in a flexible manufacturing system with an automatic tool transporter. The problem considered here is that of determining the number of tool copies of each tool type with the objective of minimizing total tardiness of orders with distinct due dates for a given budget for tool purchase. For the problem, several heuristic algorithms are developed using greedy search methods and simulation. In the heuristic algorithms, the numbers of tool copies for certain tool types are increased until they cannot be increased any more because of the budget limit. Simulation results are used to determine search directions or to select tool types of which the numbers of copies are to be increased. Computational experiments are performed on randomly generated test problems and results show that a good tool requirements plan can be obtained with the heuristic algorithms in a reasonable amount of computation time.
Yeong-Dae Kim, Geun-Cheol Lee, Seong-Kook Choi, Seung-Kil Lim
IEEE Trans. Robotics Autom.1
1999 Heuristics for a tool provisioning problem in a flexible manufacturing system with an automatic tool transporter
abstract
This paper considers a tool provisioning problem in a flexible manufacturing system (FMS) with an automatic tool transporter. The problem considered here is that of determining the number of copies of each tool type for a limited budget with the objective of minimizing makespan. This problem should be solved to decide the (additional) purchase of required tools when the FMS should be reconfigured due to change of part mix. To solve the problem, two heuristic algorithms are proposed. One is a composite search algorithm based on two greedy search methods, and the other is a search algorithm in which numbers of tool copies are determined based on tool groupings. In both algorithms, simulation results are used to find search directions. Computational experiments show that the latter search algorithm gives better results.
Hong-Bae Jun, Yeong-Dae Kim, Hyo-Won Suh
IEEE Trans. Robotics Autom.2