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Sebastian Steibl

dblp:81/6145 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2010
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Reconfigurable computing and FPGAs · 69% Processor architecture and microarchitecture · 20% Electronic design automation · 12%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs
FPGA-based emulation
0.112010
Intel nehalem processor core made FPGA synthesizable · FPGA 2010
Reconfigurable computing and FPGAs
FPGA prototyping
0.112009
Intel® atomTM processor core made FPGA-synthesizable · FPGA 2009
Reconfigurable computing and FPGAs
processor emulation
0.112009
Intel® atomTM processor core made FPGA-synthesizable · FPGA 2009
Reconfigurable computing and FPGAs › FPGA-based emulation
multi-FPGA emulation
0.012010
Intel nehalem processor core made FPGA synthesizable · FPGA 2010
Electronic design automation › hardware verification and test
hardware verification
0.012009
Intel® atomTM processor core made FPGA-synthesizable · FPGA 2009
Electronic design automation › hardware verification and test › functional verification
pre-silicon verification
0.012009
Intel® atomTM processor core made FPGA-synthesizable · FPGA 2009

Methods — techniques the papers use, named apart from their topics

latch mapping · 0.1clock gating conversion · 0.1FPGA synthesis · 0.1
YearPublicationVenuePosition
2010 Intel nehalem processor core made FPGA synthesizable
abstract
We present a FPGA-synthesizable version of the Intel Nehalem processor core, synthesized, partitioned and mapped to a multi-FPGA emulation system consisting of Xilinx Virtex-4 and Virtex-5 FPGAs. To our knowledge, this is the first time a modern state-of-the-art x86 design with the out-of-order micro-architecture is made FPGA synthesizable and capable of high-speed cycle-accurate emulation. Unlike the Intel Atom core which was made FPGA synthesizable on a single Xilinx Virtex-5 in a previous endeavor, the Nehalem core is a more complex design with aggressive clock-gating, double phase latch RAMs, and RTL constructs that have no true equivalent in FPGA architectures. Despite these challenges, we are successful in making the RTL synthesizable with only 5% RTL code modifications, partitioning the design across five FPGAs, and emulating the core at 520 KHz. The synthesizable Nehalem core is able to boot Linux and execute standard x86 workloads with all architectural features enabled.
Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang 0003
FPGA13
2009 Intel® atomTM processor core made FPGA-synthesizable
abstract
We present an FPGA-synthesizable version of the Intel Atom processor core, synthesized to a Virtex-5 based FPGA emulation system. To make the production Atom design in SystemVerilog synthesizable through industry standard EDA tool flow, we transformed and mapped latches in the design, converted clock gating, and replaced nonsynthesizable constructs with FPGA-synthesizable counterparts. Additionally, as the target FPGA emulator is hosted on a PC platform with the Pentium-based CPU socket that supports a significantly different front side bus (FSB) protocol from that of the Atom processor, we replaced the existing bus control logic in the Atom core with an alternate FSB protocol to communicate with the rest of the PC platform. With these efforts, we succeeded in synthesizing the entire Atom processor core to fit within a single Virtex-5 LX330 FPGA. The synthesizable Atom core runs at 50Mhz on the Pentium PC motherboard with fully functional I/O peripherals. It is capable of booting off-the-shelf MS-DOS, Windows XP and Linux operating systems, and executing standard x86 workloads.
Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Belliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang 0003
FPGA10