To reduce the time-to-market and photomask cost for advanced process technologies, metal-only economic cooperation organization (ECO) has become a practical and attractive solution to handle incremental design changes. Due to limited spare cells in metal-only ECO, the new added netlist may often violate the input-slew and output-loading constraints and, in turn, delay or even fail the timing closure. This paper presents a framework, named metal-only ECO slew/cap solver (MOESS), to resolve the input-slew and output-loading violations by connecting spare cells onto the violated nets as buffers. MOESS performs two buffer-insertion schemes in a sequential manner to first minimize the number of inserted buffers and then resolve timing violations, if any. The experimental results based on industrial designs demonstrate that MOESS can resolve more violations with fewer inserted buffers and less central processing unit runtime compared to an electronic design automation vendor's solution.

Multi-threshold CMOS (MTCMOS) is an effective power-gating technique to reduce IC's leakage power consumption by turning off idle devices with MTCMOS switches. However, few existing literatures have discussed the algorithms required in MTCMOS's back-end tools. In this paper, we propose a switch-routing framework which serially connects the MTCMOS switches without violating the Manhattan-distance constraint. The proposed switch-routing framework can simultaneously maximize the number of MTCMOS switches covered by its trunk path and minimize the total path length. The experimental result based on four industrial MTCMOS designs demonstrates the effectiveness and efficiency of the proposed framework compared to a solution provided by an EDA vendor and an advanced TSP solver.

To shorten the time-to-market and reduce the expensive cost of photomasks in advance process technologies, metal-only ECO has become a practical and attractive solution to handle incremental design changes. Due to limited spare cells in metal-only ECO, the new added netlist may often violate the input-slew and outputloading constraints and, in turn, delay or even fail the timing closure. This paper proposes a framework, named MOESS, to solve the input-slew and output-loading violations by connecting spare cells onto the violated nets as buffers. MOESS provides two buffer insertion schemes performed sequentially to minimize the number of inserted buffers and then to solve timing violations if there is any. This framework has been silicon-validated through industrial designs with more than 1-million instances. The experimental results demonstrate that MOESS can solve more violations with less inserted buffers and less CPU runtime compared to an EDA vendor's solution. The whole framework is built based on a commercial APR tool and can be ported to any other APR tool offering open access to its design database.