Demo Data from EDBT 2026 / reviewers in the wild / expert
Vittorio Ricchiuti
dblp:81/933
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 2003
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 56% Integrated circuit design · 44% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design
electromagnetic compatibility |
0.0 | 1 | 2003 | Power Bus Signal Integrity Improvement and EMI Mitigation on Multilayer High-Speed Digital PCBs with Embedded Capacitance · IEEE Trans. Mob. Comput. 2003 |
Electronic design automation
signal integrity |
0.0 | 1 | 2003 | Power Bus Signal Integrity Improvement and EMI Mitigation on Multilayer High-Speed Digital PCBs with Embedded Capacitance · IEEE Trans. Mob. Comput. 2003 |
Electronic design automation › physical design
printed circuit board design |
0.0 | 1 | 2003 | Power Bus Signal Integrity Improvement and EMI Mitigation on Multilayer High-Speed Digital PCBs with Embedded Capacitance · IEEE Trans. Mob. Comput. 2003 |
Methods — techniques the papers use, named apart from their topics
scattering parameter measurement · 0.0embedded capacitance · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2003 | Power Bus Signal Integrity Improvement and EMI Mitigation on Multilayer High-Speed Digital PCBs with Embedded CapacitanceabstractThe continuous technology trend in the telecommunication market toward higher operating frequencies and high processing performances will give rise to new sophisticated chip sets, processors, and RF transceivers which will demand new feature to the PCB designs. As the complexity of the integrated circuits increases, signal integrity (SI) and electromagnetic compatibility (EMC) become key elements in the board design process. This paper analyzes the beneficial effects that a thin dielectric material between a pair of power and ground layers (embedded capacitance) has both in reducing power bus resonance amplitudes (SI approach) and radiated emissions (EMC approach) as well. Scattering parameter measurements carried out on the power bus of two production boards are presented and correlated with the electric field strength measurements conducted on the same boards in a semianechoic chamber. Vittorio Ricchiuti |
IEEE Trans. Mob. Comput. | 1 |