EDBT 2026 Demo / reviewers in the wild / expert
S. K. Tsubota
dblp:82/2610
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 93% Integrated circuit design · 7% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › logic synthesis
circuit optimization |
0.0 | 1 | 1987 | An Intelligent Compiler Subsystem for a Silicon Compiler · DAC 1987 |
Electronic design automation
logic synthesis |
0.0 | 1 | 1987 | An Intelligent Compiler Subsystem for a Silicon Compiler · DAC 1987 |
Electronic design automation › physical design
module generation |
0.0 | 1 | 1987 | An Intelligent Compiler Subsystem for a Silicon Compiler · DAC 1987 |
Electronic design automation
physical design |
0.0 | 1 | 1987 | An Intelligent Compiler Subsystem for a Silicon Compiler · DAC 1987 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 1987 | An Intelligent Compiler Subsystem for a Silicon Compiler · DAC 1987 |
Methods — techniques the papers use, named apart from their topics
constraint-based optimization · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1987 | An Intelligent Compiler Subsystem for a Silicon CompilerabstractThis paper presents a module generator which automatically generates and optimizes circuitry to satisfy constraints of speed, area and power. The user has complete control over the clock timing driving the circuitry and the area, width, or height of the resulting module. Unlike other programs that have been optimized for area and speed, this program supports more degrees of freedom and a broad range of circuit constructs, permitting a complete integrated circuit to be designed to meet the overall IC project objectives. D. L. Johannsen, S. K. Tsubota, Kenneth S. McElvain |
DAC | 2 |