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Shalhav Zohar

dblp:82/326 · DBLP profile ↗
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14ranked-venue papers
14as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 9 · 9 first-authorGraphics, computer vision, multimedia, augmented reality and games · 2 · 2 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 2 first-authorComputer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Physical-layer communications · 100%
Computer architecture, parallel and distributed computing, and storage systems
7 papers
Integrated circuit design · 59% Processor architecture and microarchitecture · 25% Hardware accelerators and domain-specific architectures · 8%
Theoretical computer science
3 papers
Algorithms and data structures · 60% Mathematical optimization · 40%

Topics — the 15 heaviest of 15, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital signal processing circuits
0.041976
A Realization of the RAM Digital Filter · IEEE Trans. Computers 1976
Fast Hardware Fourier Transformation Through Counting · IEEE Trans. Computers 1973
The Counting Recursive Digital Filter · IEEE Trans. Computers 1973
Physical-layer communications › antenna arrays
adaptive antenna array
0.011982
Outline of a Multiple-Access Communication Network Based on Adaptive Arrays · IEEE Trans. Commun. 1982
Physical-layer communications
antenna arrays
0.011982
Outline of a Multiple-Access Communication Network Based on Adaptive Arrays · IEEE Trans. Commun. 1982
Physical-layer communications
multiple access
0.011982
Outline of a Multiple-Access Communication Network Based on Adaptive Arrays · IEEE Trans. Commun. 1982
Physical-layer communications › MIMO
spatial multiplexing
0.011982
Outline of a Multiple-Access Communication Network Based on Adaptive Arrays · IEEE Trans. Commun. 1982
Processor architecture and microarchitecture › computer arithmetic
number representation
0.031976
Rounding and Truncation in Radix (-2) Systems · IEEE Trans. Computers 1976
A/D Conversion for Radix (-2) · IEEE Trans. Computers 1973
Negative Radix Conversion · IEEE Trans. Computers 1970
Algorithms and data structures
numerical linear algebra
0.021974
The Solution of a Toeplitz Set of Linear Equations · J. ACM 1974
Toeplitz Matrix Inversion: The Algorithm of W. F. Trench · J. ACM 1969
Mathematical optimization
numerical analysis
0.011976
Rounding and Truncation in Radix (-2) Systems · IEEE Trans. Computers 1976
Physical-layer communications
signal processing for communications
0.011982
Outline of a Multiple-Access Communication Network Based on Adaptive Arrays · IEEE Trans. Commun. 1982
Integrated circuit design
analog and mixed-signal circuits
0.011973
A/D Conversion for Radix (-2) · IEEE Trans. Computers 1973
Integrated circuit design › analog and mixed-signal circuits › data converters
analog-to-digital converter
0.011973
A/D Conversion for Radix (-2) · IEEE Trans. Computers 1973
High-performance computing
fast fourier transform
0.011973
Fast Hardware Fourier Transformation Through Counting · IEEE Trans. Computers 1973
Hardware accelerators and domain-specific architectures › signal processing accelerator
FFT accelerator
0.011973
Fast Hardware Fourier Transformation Through Counting · IEEE Trans. Computers 1973
Integrated circuit design › digital signal processing circuits
recursive digital filters
0.011973
The Counting Recursive Digital Filter · IEEE Trans. Computers 1973
Algorithms and data structures › numerical linear algebra › structured matrices
toeplitz matrix inversion
0.011969
Toeplitz Matrix Inversion: The Algorithm of W. F. Trench · J. ACM 1969

Methods — techniques the papers use, named apart from their topics

position information · 0.0error bound analysis · 0.0direct computation · 0.0successive approximation · 0.0prime-factor algorithm · 0.0parallel counting · 0.0fast algorithms · 0.0counting operation · 0.0bit-level convolution · 0.0RAM-based filtering · 0.0trench algorithm · 0.0radix conversion · 0.0
YearPublicationVenuePosition
1982 An improved beam-forming algorithm for adaptive arrays
abstract
We consider an n-element array formingK \leq nbeams in order to receive signals from K sources whose positions and power levels are known. The array employs K sets of n weights to segregate the K signals. These weights are determined by direct computation based on the available position information. Currently known techniques require (for n = K) about (4/3)K4computer "operations" (multiply and add). We present here an improved technique that accomplishes that in 8K3operations, yielding a reduction by a factor of K/6.
Shalhav Zohar
ICASSP1
1982 Outline of a Multiple-Access Communication Network Based on Adaptive Arrays
abstract
This paper proposes a single-frequency communication system consisting ofKmobile users simultaneously communicating with a central station equipped with a computationally adapted array consisting ofn≥Kantennas. The array employsKsets ofnweights to segregate the signals received from theKusers. The weights are determined by direct computation based on position information determined by direct computation based on position information transmitted by the users. Currently known techniques require (forn=K) about (4/3)K4computer `operations' (multiply and add). An improved technique is developed here which accomplishes this in 8/K3operations, yielding a reduction by a factor ofK/6.
Shalhav Zohar
IEEE Trans. Commun.1
1980 Outline of a fast hardware implementation of Winograd's DFT algorithm
abstract
Winograd's DFT algorithm is applied to the design of a fast DFT machine. The main feature of the proposed machine in comparison with alternative designs is a shift in hardware investment from computing elements to storage elements. There are indications that this could lead to significant cost reductions. A more detailed version of this paper [1] also describes a spectrum analyzer variant.
Shalhav Zohar
ICASSP1
1976 Rounding and Truncation in Radix (-2) Systems
abstract
Examination of rounding and truncation errors in radix (−2) systems establishes the following facts: 1) truncation error is 33 percent lower than in the positive radix case. 2) There is no 1-bit rounding algorithm. 3) The error bound of the standard (1-bit) positive radix rounding algorithm can be approached asymptotically by using more than one of the discarded bits. For N bits, this error bound is multiplied by 1 + (3. 2N−l)−1.
Shalhav Zohar
IEEE Trans. Computers1
1976 A Realization of the RAM Digital Filter
abstract
The digital filtering algorithm of W. D. Little, which employs a large RAM to obtain high speed, is implemented in a simple hardware configuration.
Shalhav Zohar
IEEE Trans. Computers1
1974 The Solution of a Toeplitz Set of Linear Equations
abstract
The solution of a set of m linear equations with a non-Hermitian Toeplitz associated matrix is considered. Presently available fast algorithms solve this set with 4 m 2 “operations” (an “operation” is defined here as a set of one addition and one multiplication). An improved algorithm requiring only 3 m 2 “operations” is presented.
Shalhav Zohar
J. ACM1
1974 Comments on "Fast Hardware Fourier Transformation Through Counting"
abstract
The Appendix of the above paper1 presents a serial sign flipper for radix (-2). Recently, a simpler realization has been brought to the attention of the author. The improved circuit has been developed independently of the published design by H. C. Wilck of the Jet Propulsion Laboratory, Pasadena, Calif. His approach to the problem is quite different from the author's.
Shalhav Zohar
IEEE Trans. Computers1
1973 New Hardware Realizations of Nonrecursive Digital Filters
abstract
Analysis of the bit-level operations involved in the convolution realizing a nonrecursive digital filter leads to hardware designs of digital filters based on the operation of counting.
Shalhav Zohar
IEEE Trans. Computers1
1973 The Counting Recursive Digital Filter
abstract
Analysis of the bit-level operations involved in the convolutions realizing recursive digital filters leads to hardware designs of such filters based on the operation of counting. Various designs realizing both the canonic and "direct" forms are presented with particular emphasis on low-cost low-speed high-flexibility machines.
Shalhav Zohar
IEEE Trans. Computers1
1973 Fast Hardware Fourier Transformation Through Counting
abstract
Hardware Fourier transformations are considered with the goal of increasing speed through parallel operation. Two designs in which the basic element is a fast counter are developed. One is applicable when the number of transformed points N is prime while the other, requiring somewhat more hardware, is applicable to all N.
Shalhav Zohar
IEEE Trans. Computers1
1973 A/D Conversion for Radix (-2)
abstract
The direct conversion of an analog signal to its digital representation in base (-2) is considered. A successive approximation version strategy is developed and applied to a practical converter that is described in detail.
Shalhav Zohar
IEEE Trans. Computers1
1971 Author's Reply2
abstract
My paper "Negative Radix Conversion," contained the only reference known to me at the time [1].
Shalhav Zohar
IEEE Trans. Computers1
1970 Negative Radix Conversion
abstract
Adoption of a negative radix for number representation results in a system that is totally indifferent to the sign of the number. Compared to the sign-magnitude representation, the approach considered here requires one extra digit.
Shalhav Zohar
IEEE Trans. Computers1
1969 Toeplitz Matrix Inversion: The Algorithm of W. F. Trench
abstract
The algorithm of W. F. Trench for the inversion of Toeplitz matrices is presented with a detailed proof for the case of non-Hermitian matrices. The only condition necessary to insure the validity of the algorithm is that all principal minors be nonzero.
Shalhav Zohar
J. ACM1