The article proposes a method for diagnosing faults and cyberattacks in electric power generation units that consist of a wind-turbine and of an asynchronous (DFIG) generator. The method relies on a differential flatness theory-based implementation of the nonlinear Kalman Filter, known as Derivative-free nonlinear Kalman Filter. The estimated outputs provided by the Kalman filter are subtracted from the real outputs measured from the power unit, thus generating the residuals sequence. It is proven that the sum of the squares of the residuals vectors, weighted by the inverse of the residuals covariance matrix, stands for a stochastic variable that follows the χ2distribution. By exploiting the statistical properties of the χ2distribution one can define confidence intervals which allow for deciding at a high certainty level about the appearance of a fault or cyberattack in the wind-power system.

Recent market forecasts predict that the portable computing trend will vastly spread, as by 2020 there will bemore than 3 billion LTE device users worldwide. Motivated by this fact, many companies and research institutes have already launched research projects that utilize portable devices, voluntarily provided by users, to perform the required computations. Many such projects employ Berkeley's BOINC middleware, since it can support a large variety of stationary and mobile devices. However, currently available BOINC high-level APIs, either do not support portable devices or lack advanced processing capabilities (such as inter-node task dependencies) and/or easiness of use. To resolve these issues, we propose the mCluster software framework for application execution powered by the BOINC middleware on portable devices. mCluster adopts a task-based programming model that requires simple, pragma-based annotations of the application software, in order to dynamically resolve task dependencies. To evaluate our framework, we have have mapped a scientific application from the neuroscience domain on an small-scaled network of portable devices. mCluster significantly reduces the required programming effort and complexity to efficiently map BOINC-powered applications with task dependencies on portable devices compared to previous approaches.

The PDE model of the commodities price dynamics is shown to be equivalent to a multi-asset Black-Scholes PDE. Actually it is a diffusion process evolving in a 2D assets space, where the first asset is the commodity's spot price and the second asset is the convenience yield. By applying semi-discretization and a finite differences scheme this multi-asset PDE is transformed into a state-space model consisting of ordinary nonlinear differential equations. For the local subsystems, into which the commodities PDE is decomposed, it becomes possible to apply boundary-based feedback control. The controller design proceeds by showing that the state-space model of the commodities PDE stands for a differentially flat system. Next, for each subsystem which is related to a nonlinear ODE, a virtual control input is computed, that can invert the subsystem's dynamics and can eliminate the subsystem's tracking error. From the last row of the state-space description, the control input (boundary condition) that is actually applied to the multi-factor commodities' PDE system is found. This control input contains recursively all virtual control inputs which were computed for the individual ODE subsystems associated with the previous rows of the state-space equation. Thus, by tracing the rows of the state-space model backwards, at each iteration of the control algorithm, one can finally obtain the control input that should be applied to the commodities PDE system so as to assure that all its state variables will converge to the desirable setpoints.

To assure power quality and stability of the electricity network it is important to perform control and synchronization of the inverters which are used in the connection of distributed DC power generation units to the grid. It is proven that the model of the inverters, is a differentially flat one. By exploiting differential flatness properties it is shown that the multiple inverters model can be transformed into a set of local inverter models which are decoupled and linearized. For each local inverter the design of a state feedback controller becomes possible, e.g. using pole placement methods. Such a controller processes measurements not only coming from the individual inverter but also coming from other inverters which are connected to the grid. Moreover, to estimate the non-measurable state variables of each local inverter, the Derivative-free nonlinear Kalman Filter is used. This consists of the Kalman Filter recursion applied to the local linearized model of the inverter and of an inverse transformation that is based on differential flatness theory, which enables to compute estimates of the state variables of the initial nonlinear model of the inverter. Furthermore, by redesigning the aforementioned filter as a disturbance observer it becomes also possible to estimate and compensate for disturbance terms that affect each local inverter.

The paper proposes a new method for the control of nonlinear dynamical systems which is based on differential flatness theory. The method assumes that the system is already found or can be transformed to the so-called triangular form. The controller design proceeds by showing that each row of the statespace model of the nonlinear system stands for a differentially flat system, where the flat output is chosen to be the associated state variable. Next, for each subsystem which is linked with a row of the state-space model a virtual control input is computed, that can invert the subsystem's dynamics and can eliminate the subsystem's tracking error. From the last row of the state-space description, the control input that is actually applied to the nonlinear system is found. This control input contains recursively all virtual control inputs which were computed for the individual subsystems associated with the previous rows of the state-space equation. Thus, by tracing the rows of the state-space model backwards, at each iteration of the control algorithm, one can finally obtain the control input that should be applied to the nonlinear system so as to assure that all its state vector elements will converge to the desirable setpoints. The proposed flatness-based control method can solve efficiently several nonlinear control problems. Indicative evaluation results are presented in the manuscript in the form of simulation experiments. These confirm also the potential application of the proposed control method to electric power generators and to renewable power generation systems.

The paper studies differential flatness properties and an input-output linearization procedure for doubly-fed induction generators (DFIGs). By defining flat outputs which are associated with the rotor's angle and the magnetic flux of the stator an equivalent DFIG description in the Brunovksy (canonical) form is obtained. For the linearized canonical model of the generator a feedback controller is designed. Moreover, a comparison of the differential flatness theory-based control method against Lie algebra-based control is provided. At a second stage, a novel Kalman Filtering method (derivative-free nonlinear Kalman Filtering) is introduced. The proposed Kalman Filter is redesigned as disturbance observer for estimating additive input disturbances to the DFIG model. These estimated disturbance terms are finally used by a feedback controller that enables the generator's state variables to track desirable setpoints. The efficiency of the proposed state estimation-based control scheme is tested through simulation experiments.

The paper is concerned with proving differential flatness of the three-phase voltage source converter (VSC) model and its resulting description in the Brunovksy (canonical) form. For the linearized canonical model of the converter a feedback controller is designed. At a second stage, a novel Kalman Filtering method (derivative-free nonlinear Kalman Filtering) is introduced. The proposed Kalman Filter is redesigned as disturbance observer for estimating perturbations in the VSC model. These estimated disturbance terms are finally used by a feedback controller that enables the DC output voltage to track desirable setpoints. The efficiency of the proposed state estimation-based control scheme is tested through simulation experiments.

This paper describes a novel approach for the design of a time domain equalizer for a Discrete Multi Tone (DMT) Digital Subscriber Loop (DSL) modem. The key role of the equalizer is to act upon the equivalent digital channel impulse response at the receiving end to yield a combined impulse response with a linear phase characteristic. Using two-port channel models from the ANSI VDSL standard [1] it is shown how group delay characteristics of typical channels can be modeled by small order polynomials that fall into one of the following categories; all-zero mixed phase, all-pole mixed phase, ARMA minimum phase, and finally ARMA maximum phase systems. A discussion follows to suggest a suitable algorithm based on Prony's method for finding appropriate minimum phase channel models which can be inverted to give equalizer blocks.

To meet the demand for higher performance, flexibility, and economy in today's state-of-the-art networks, an alternative to the ASICs that traditionally were used to implement packet-processing functions in hardware, called network processors (NPs), has emerged. In this paper, we briefly outline the architecture of such an innovative network processor aiming at the acceleration of protocol processing in high-speed network interfaces, and we use this architecture as a case study for our measurements. We focus on the performance of the general purpose processors used for executing high level protocol processing, since this part proves to be the bottleneck of the design. The performance is analyzed by executing a set of widely used, real applications and by applying network traffic according to certain stochastic criteria. The performance of the RISC used is compared with that of other well-known CPU architectures so as to verify that our results are applicable to the general network processors era. As our results demonstrate, the bottleneck of the majority of the network processors is the general-purpose processing units used, since today's network protocols need a great amount of high-level processing. On the other hand the specific purpose processors or co-processors, optimized for certain part of the network packet processing, involved in such systems, can provide the power needed, even at today's ultra high network speeds.

Two of the main bottlenecks when designing a network embedded system are very often the memory bandwidth and its capacity. This is mainly due to the extremely high speed of the state-of-the-art network links and to the fact that in order to support advanced quality of service (QoS), per-flow queueing is desirable. In this paper we describe the architecture of a memory manager that can provide up to 10Gbs of aggregate throughput while handling 512K queues. The presented system supports a complete instruction set and thus we believe it can be used as a hardware component in any suitable embedded system, particularly network SoCs that implement per flow queuing. When designing this scheme several optimisation techniques have been evaluated and the most cost and performance effective ones used. These techniques minimize both the memory bandwidth and the memory capacity needed, which is considered a main advantage of the proposed scheme. The proposed architecture uses a simple DRAM for data storage and a typical SRAM for keeping data structures-pointers, therefore minimising the system's cost. The device has been fabricated within a novel programmable network processor designed for efficient protocol processing in high speed networking applications. It consists of 155K Gates and occupies 5.23 mm in UMC 0.18υ CMOS.

Emerging applications for network processors require increased number of processing resources. This paper introduces a novel system to load balance the scheduled traffic over multiple processing cores maintaining in-order service. It is conceived in the framework of today's demanding network processors, but it is obviously applied to every multiprocessor platform. The focus of the paper is on an efficient load-balancer supported by a high speed dual-pipeline engine tailored to operate at line rates over OC-192/10Gbps. Finally, an optimized implementation is presented occupying 1.34 mm/sup 2/ using a standard 0.18 /spl mu/m CMOS technology, while supporting 59.5 Million network packets per second.

The wireless network evolution, delineated during the last years, has urged the necessity to extend the up-to-now static business environment to a mobile and wireless one. However, the current and forthcoming wireless technologies are characterized by different attributes regarding the coverage area, offered bandwidth and delay. The transparent conjunction of various wireless technologies into a single mobile terminal can further boost the wireless explosion. This paper presents the architectural approach and the results concerning the continuous connectivity and seamless switching between two complementary wireless networks, one 802.11-compliant in the short area and a CSM in the wide area. The described experiments were performed on an open, IP-based wireless architecture that can be easily extended to accommodate future wireless networks.

In a world where virtually all consumer devices will soon be speaking the same digital language, the ability to connect hardware and distribute content from one box to another creates important opportunities for extending networks into millions of consumer homes; connecting each house to the Internet represent an unprecedented opportunity to increase network traffic and expand the customer base beyond the corporate sphere. This paper outlines the work carried out in InfoGate, a European research and development project under the ESPRIT programme, that designed and implemented a multiservice residential gateway platform. A residential gateway (also called residential concentrator, residential hub, residential communications controller or integrated access device) is, in the most simple terms, a bridge between the access network (or the local loop) which connects to the core network gateways (e.g. Internet) end the home local network. The paper describes the service requirements and focuses on the wireless access and indoor interfaces.

Broadband wireless technology appears to be one of the competitive solutions for the last mile problem. Wireless access systems enable one to incrementally roll out infrastructure and rapidly turn up new services such as high-speed Internet access and video distribution. In this paper, implementation challenges toward an adaptive orthogonal frequency division multiplexing (OFDM) point-to-multipoint outdoor broadband wireless access system are examined. The frequency band tackled is located at 10.5 GHz but the results can be applied to other areas of the spectrum as well. The targeted bit rates go up to 34 Mbps, for varying channel conditions. Dynamic time division multiple access/time division duplex (DTDMA/TDD) is selected for the medium access scheme, since TDD requires only a single unpaired frequency band (thus reducing the cost for purchasing licensed spectrum), while TDMA distributes the number of slots per uplink or downlink direction according to the traffic that each direction has to transmit. In addition, OFDM techniques provide a robust behavior in the presence of multipath fading. This paper focuses on the wireless data link control (W-DLC) layer, addressing the system protocol stack and all W-DLC sublayers, entities and functions, and providing a framework that will be beneficial for a licensed outdoor wireless system.

This work evaluates the performance of an image compression system based on wavelet-based subband decomposition and vector quantization. The images are decomposed using wavelet filters into a set of subbands with different resolutions corresponding to different frequency bands. The resulting subbands are vector quantized using the Linde-Buzo-Gray (LBG) algorithm and various fuzzy algorithms for learning vector quantization (FALVQ). These algorithms perform vector quantization by updating all prototypes of a competitive neural network through an unsupervised learning process. The quality of the multiresolution codebooks designed by these algorithms is measured on the reconstructed images belonging to the training set used for multiresolution codebook design and the reconstructed images from a testing set.

Volterra functional expansions are power series with memory that explicitly characterize the input/output relationship of a finite-memory single-valued nonlinear black box whenever the latter is time-invariant and stable. The purpose of this paper is to introduce and report on the strengths and weaknesses of two distinct Volterra-series-type classes of adaptive nonlinear techniques for the quantitative measurement of second- and third-order harmonic distortion present in the communications channel of a, possibly signal space coded, QAM data communication system. Our investigation was originated as part of a request for new nondisruptive impairment measurement algorithms that would reliably characterize in real-time the performance of voiceband modems over both D1 conditioned private lines and the direct-distance-dialing (DDD) public switched network. Though, contrary to earlier studies, we do not contemplate nonlinear distortion compensator design, experimental evidence obtained by implementing the simplest of our nondisruptive algorithms on a digital signal processor chip verifies that over a certain range of signal-to-second- and third-order intermodulation distortion ratios our measurements are consistent with those obtained via the disruptive digital four tone test under a variety of voiceband telephone channel impairment conditions. Unfortunately, our experiments also indicate that neither the digital four-tone test nor any of our nondisruptive techniques have chances to prove useful for greater than 5% of the existing voiceband channels. However, this is entirely due to the special nature of the telephone channel environment and is not likely to dilute the importance of our proposal for other types of nonlinear environments such as radio channels or satellite links.>

The authors propose and evaluate a receiver architecture which combines the power of a decision feedback equalizer (DFE) with trellis coding, while allowing for minimal decoding delay in such a way that the total gain of the system is additive. The system is based on a structure that transposes the feedback filter of the DFE into the transmitter and, for high-order constellations, provides negligible increase in transmitter power. The first known hardware realization of a high bit rate digital subscriber line (HDSL) system that achieves the coding gain provided by a trellis code in addition to the equalization gain provided by the DFE is presented. A system whose complexity of implementation is comparable to that of a typical DFE and an independent Viterbi decoder is proposed.>