Demo Data from EDBT 2026 / reviewers in the wild / expert
Erwan Le Thenaff
dblp:82/3880
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2003
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Processor architecture and microarchitecture · 75% Interconnection networks and networks-on-chip · 25% | |
| Software engineering, system software, and programming languages
1 paper |
Compilers and program optimization · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › instruction-level parallelism › VLIW
clustered VLIW |
0.0 | 1 | 2003 | Inter-Cluster Communication Models for Clustered VLIW Processors · HPCA 2003 |
Processor architecture and microarchitecture
instruction scheduling |
0.0 | 1 | 2003 | Inter-Cluster Communication Models for Clustered VLIW Processors · HPCA 2003 |
Interconnection networks and networks-on-chip
inter-cluster communication |
0.0 | 1 | 2003 | Inter-Cluster Communication Models for Clustered VLIW Processors · HPCA 2003 |
Processor architecture and microarchitecture › instruction-level parallelism › VLIW
VLIW processor |
0.0 | 1 | 2003 | Inter-Cluster Communication Models for Clustered VLIW Processors · HPCA 2003 |
Compilers and program optimization
instruction scheduling |
0.0 | 1 | 2003 | Inter-Cluster Communication Models for Clustered VLIW Processors · HPCA 2003 |
Methods — techniques the papers use, named apart from their topics
extended operands · 0.1copy operations · 0.1broadcasting · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2003 | Cluster assignment of global values for clustered VLIW processorsabstractIn this paper high-level language (HLL) variables that are alive in a whole HLL function, across multiple scheduling units, are termed as global values. Due to their long live ranges and, hence, large impact on the schedule, the global values require different compiler optimizations than local values, which span across only one scheduling unit. The instruction scheduler for a clustered ILP processor, which is responsible for cluster assignment of operations and variables, faces a difficult problem of assigning global values to clusters. Our study shows that trivial assignments (e.g. mapping all global values into one cluster) may result in a severe cycle count overhead relative to the unicluster of up to 26.3% for a four cluster VLIW machine. This paper presents three advanced algorithms for assigning global values to clusters based on multi-pass scheduling and affinity of variables. Furthermore, we measure performance of these algorithms on optimized multimedia C applications and assess quality of our algorithms by comparing them to a practical higher performance bound derived from a vast random search. Our algorithms reduce the execution time overhead of the best simple algorithm round-robin from 10.5% to 5.9% for the two cluster VLIW machine and from 17.3% to 14.12% for the four cluster VLIW machine. Andrei Sergeevich Terechko, Erwan Le Thenaff, Henk Corporaal |
CASES | 2 |
| 2003 | Inter-Cluster Communication Models for Clustered VLIW ProcessorsabstractClustering is a well-known technique to improve the implementation of single register file VLIW processors. Many previous studies in clustering adhere to an inter-cluster communication means in the form of copy operations. This paper, however, identifies and evaluates five different inter-cluster communication models, including copy operations, dedicated issue slots, extended operands, extended results, and broadcasting. Our study reveals that these models have a major impact on performance and implementation of the clustered VLIW. We found that copy operations executed in regular VLIW issue slots significantly constrain the scheduling freedom of regular operations. For example, in the dense code for our four cluster machine the total cycle count overhead reached 46.8% with respect to the unicluster architecture, 56% of which are caused by the copy operation constraint. Therefore, we propose to use other models (e.g. extended results or broadcasting), which deliver higher performance than the copy operation model at the same hardware cost. Andrei Sergeevich Terechko, Erwan Le Thenaff, Manish Garg, Jos T. J. van Eijndhoven, Henk Corporaal |
HPCA | 2 |