Demo Data from EDBT 2026 / reviewers in the wild / expert
Brandyn Roemer
dblp:82/4266
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2007
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 77% Processor architecture and microarchitecture · 23% | |
| Network and information security
1 paper |
Systems and software security · 100% |
Topics — the 2 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Systems and software security
memory safety |
0.1 | 1 | 2007 | MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging · HPCA 2007 |
Processor architecture and microarchitecture
programmable state machine |
0.0 | 1 | 2007 | MemTracker: Efficient and Programmable Support for Memory Access Monitoring and Debugging · HPCA 2007 |
Methods — techniques the papers use, named apart from their topics
state transition table · 0.1hardware monitoring · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2007 | MemTracker: Efficient and Programmable Support for Memory Access Monitoring and DebuggingabstractMemory bugs are a broad class of bugs that is becoming increasingly common with increasing software complexity, and many of these bugs are also security vulnerabilities. Unfortunately, existing software and even hardware approaches for finding and identifying memory bugs have considerable performance overheads, target only a narrow class of bugs, are costly to implement, or use computational resources inefficiently. This paper describes MemTracker, a new hardware support mechanism that can be configured to perform different kinds of memory access monitoring tasks. MemTracker associates each word of data in memory with a few bits of state, and uses a programmable state transition table to react to different events that can affect this state. The number of state bits per word, the events to which MemTracker reacts, and the transition table are all fully programmable. MemTracker's rich set of states, events, and transitions can be used to implement different monitoring and debugging checkers with minimal performance overheads, even when frequent state updates are needed. To evaluate MemTracker, we map three different checkers onto it, as well as a checker that combines all three. For the most demanding (combined) checker, we observe performance overheads of only 2.7% on average and 4.8% worst-case on SPEC 2000 applications. Such low overheads allow continuous (always-on) use of MemTracker-enabled checkers even in production runs Guru Venkataramani, Brandyn Roemer, Yan Solihin, Milos Prvulovic |
HPCA | 2 |