Shinji Odanaka

dblp:82/4298 · DBLP profile ↗
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6ranked-venue papers
5as first author
0since 2021 · last 2007
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 6 · 5 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
6 papers
Electronic design automation · 83% Integrated circuit design · 8% Parallel and multicore computing · 6%

Topics — the 13 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
device simulation
0.142007
A High-Resolution Method for Quantum Confinement Transport Simulations in MOSFETs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
Multidimensional discretization of the stationary quantum drift-diffusion model for ultrasmall MOSFET structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2004
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Electronic design automation › technology computer-aided design
quantum drift-diffusion model
0.122007
A High-Resolution Method for Quantum Confinement Transport Simulations in MOSFETs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
Multidimensional discretization of the stationary quantum drift-diffusion model for ultrasmall MOSFET structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2004
Electronic design automation › technology computer-aided design › process and device simulation
discretization scheme
0.112007
A High-Resolution Method for Quantum Confinement Transport Simulations in MOSFETs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
Electronic design automation › technology computer-aided design › device simulation
MOSFET simulation
0.122004
Multidimensional discretization of the stationary quantum drift-diffusion model for ultrasmall MOSFET structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2004
SMART-II: a three-dimensional CAD model for submicrometer MOSFET's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Integrated circuit design
semiconductor device modeling
0.042007
A High-Resolution Method for Quantum Confinement Transport Simulations in MOSFETs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2007
Multidimensional discretization of the stationary quantum drift-diffusion model for ultrasmall MOSFET structures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2004
SMART-II: a three-dimensional CAD model for submicrometer MOSFET's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
Parallel and multicore computing › parallel computation models
massively parallel computation
0.011995
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Parallel and multicore computing
parallel computing
0.011995
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Electronic design automation › technology computer-aided design › device simulation
three-dimensional MOSFET simulation
0.011995
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Electronic design automation › technology computer-aided design
process simulation
0.021989
Numerical modeling of nonplanar oxidation coupled with stress effects · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
High-performance computing › iterative methods
conjugate gradient
0.011995
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
Parallel and multicore computing › parallel algorithms › parallel matrix algorithms
parallel iterative solvers
0.011995
Massively parallel computation using a splitting-up operator method for three-dimensional device simulation · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1995
High-performance computing
scientific computing systems
0.021991
SMART-II: a three-dimensional CAD model for submicrometer MOSFET's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
High-performance computing › scientific computing systems
supercomputer simulation
0.021991
SMART-II: a three-dimensional CAD model for submicrometer MOSFET's · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1991
SMART-P: rigorous three-dimensional process simulator on a supercomputer · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

exponential-fitting method · 0.1slope limiter · 0.1flux-limiter method · 0.1finite volume method · 0.0conservative difference scheme · 0.0splitting-up operator method · 0.0incomplete factorization · 0.0conjugate gradient · 0.0BiCGStab · 0.0finite difference method · 0.0
YearPublicationVenuePosition
2007 A High-Resolution Method for Quantum Confinement Transport Simulations in MOSFETs
abstract
This paper describes a new discretization scheme for quantum confinement transport simulations using a quantum drift-diffusion model. A high-resolution scheme is constructed by developing an exponential-fitting method with the slope limiter in a class of conservative schemes to simulate the flow of electrons with quantum confinement effects in MOSFETs. This method is reinterpreted as a flux-limiter method that hybridizes a low-order flux and a high-order flux into a single numerical flux. The discretization method provides good approximations to the density profile in the smooth regions and boundary layers of the electron flow and allows high-resolution simulations of quantum confinement transport in ultrasmall MOSFETs
Shinji Odanaka
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
2004 Multidimensional discretization of the stationary quantum drift-diffusion model for ultrasmall MOSFET structures
abstract
This paper describes a new approach to construct a multidimensional discretization scheme of quantum drift-diffusion (QDD) model (or density gradient model) arising in MOSFET structures. The discretization is performed for the stationary QDD equations replaced by an equivalent form, employing an exponential transformation of variables. A multidimensional discretization scheme is constructed by making use of an exponential-fitting method in a class of conservative difference schemes, applying the finite-volume method, which leads to a consistent generalization of the Scharfetter-Gummel expression to the nonlinear Sturm-Liouville type equation. The discretization method is evaluated in a variety of MOSFET structures, including a double-gate MOSFET with thin body layer. The discretization method provides numerical stability and accuracy for carrier transport simulations with quantum confinement effects in ultrasmall MOSFET structures.
Shinji Odanaka
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1995 Massively parallel computation using a splitting-up operator method for three-dimensional device simulation
abstract
This paper presents a new parallel algorithm and performance results of iterative solution methods for three-dimensional MOSFET simulation with Gummel's method. A splitting-up operator method is proposed for incomplete factorization of sparse matrices arising from semiconductor device equations, suitable for parallel computations. This method is combined with the conjugate gradients and BiCGSTAB procedure to obtain a new parallel version of the iterative solution methods. Natural parallelism is realized by developing the solution method according to the natural ordering. In large-scale simulations of greater than 100000 grid nodes, the high parallel efficiency level over 90% can be achieved using a new-type massively parallel computer: ADENART with up to 256 processors. The real performance of the solution methods is superior to those calculated by the vectorized version of the ICCG and ILUBiCGSTAB methods using a vector-type supercomputer.>
Shinji Odanaka, Tatsuo Nogi
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1991 SMART-II: a three-dimensional CAD model for submicrometer MOSFET's
abstract
The authors describe a three-dimensional CAD model for submicrometer MOSFETs. The model has been implemented in a three-dimensional process/device integrated simulator, SMART-II, using a supercomputer. The MOS device model for hot electron transport is based on a modified current relation including an electron temperature effect in an inhomogeneous field. The need for an improved mobility model in an inversion layer and an impact ionization model using the recent experimental data for the mean free path is discussed with emphasis on the numerical simulation for I/V characteristics of small-geometry MOSFETs from the threshold regime to the avalanche regime. It is found that this approach is effective in realizing a three-dimensional CAD model for 0.5- mu m MOSFETs. An application of the model reveals a three-dimensional effect of avalanche breakdown behavior in small-geometry MOSFETs.>
Shinji Odanaka, Akira Hiroki, Kikuyo Ohe, Kaori Moriyama, Hiroyuki Umimoto
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1
1989 Numerical modeling of nonplanar oxidation coupled with stress effects
abstract
The study focuses on the numerical solution method based on a finite-difference approach with the coordinate transformation method for simulating the nonplanar oxide growth. A relaxation technique is introduced to incorporate the stress effect into oxidation kinetic equations maintaining numerical stability. In addition, for simulating the stress-dependent oxide growth, the role of the boundary condition at the free-oxide surface is discussed. The present method allows an accurate evaluation of the local stress distribution in nonplanar oxide structures and realizes the precise simulation of oxide shapes under the large stress effect. They are demonstrated in applications to both the LOCOS process with thick nitride film and the trench oxidation process, which strongly depends on the oxidation-induced stress at trench corners.>
Hiroyuki Umimoto, Shinji Odanaka, Ichiro Nakao, Hideya Esaki
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
1988 SMART-P: rigorous three-dimensional process simulator on a supercomputer
abstract
A description is given of a three-dimensional process simulator, named SMART-P, that is based on the finite-difference approach to the supercomputer FACOM VP-100. To simulate the impurity redistribution and nonplanar structure in the Si/SiO/sub 2/ system, this simulator contains a three-dimensional oxidation model, an interaction model of impurities, a numerical model of interstitial-assisted oxidation-enhanced diffusion, and other process models. The numerical process modeling in the Si/SiO/sub 2/ system is described. The three-dimensional process modeling CAD (computer-aided design) has been realized by using efficient numerical algorithms based on the generalized coordinate transformation method. The capabilities of this simulator have been demonstrated in applications relating to both local oxidation of silicon (LOCOS) and trench-isolated 0.5 mu m MOSFET structures.>
Shinji Odanaka, Hiroyuki Umimoto, Mutsuko Wakabayashi, Hideya Esaki
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.1