When multiprocessor system-on-chip designs are subjected to aggressive scaling of the processing technology, severe thermal effects will influence the performance, power and reliability of integrated circuits (ICs). Hence, IC designers employ mesh-based transient thermal analysis (MTTA) to effectively predict the variations and distribution of temperatures in a chip during the early stages of IC design. The number of cells used in MTTA tools is decided by the user. However, users are generally unclear about whether the number of cells used for three dimensions is appropriate. An unsuitable number of cells may reduce the analytical performance or cause larger analysis errors in MTTA. Hence, MTTA using an appropriate number of cells can obtain higher analytical performance while maintaining acceptable accuracy. In this paper, we developed a temperature gradient exploration (TGE) method for exploring the appropriate number of cells to use in MTTA. The experimental results showed that the TGE method can find the appropriate number of cells and enhance the analytical performance of MTTA with acceptable accuracy.

A sophisticated SoC chip that incorporates many design modules including 2 ARM-like CPUs, a dynamic voltage and frequency scaling (DVFS) design, a master/slave temperature sensing system, and an on-chip test/debug platform is developed and implemented with TSMC 90 nm technology. Measurement results validate the functions and efficiencies of the whole chip.