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Andrew D. Hurt

dblp:83/1565 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 1982
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 87% Processor architecture and microarchitecture · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › real-time scheduling
hardware task scheduling
0.011982
A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor Architecture · RTSS 1982
Embedded and real-time systems
real-time scheduling
0.011982
A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor Architecture · RTSS 1982
Processor architecture and microarchitecture
multiprocessor architecture
0.011982
A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor Architecture · RTSS 1982
YearPublicationVenuePosition
1982 A distributed computer architecture for real-time, data driven applications
J. Robert Heath, George Broomell, Andrew D. Hurt
ICDCS3
1982 The Design of a Fault-Tolerant Computing Element for Distributed Data Processors
Andrew D. Hurt, J. Robert Heath
ICDCS1
1982 A Hardware Task Scheduling Mechanism for a Real-Time Multi-Microprocessor Architecture
Andrew D. Hurt, J. Robert Heath
RTSS1