Semiconductor wafer fab operations are characterized by complex and reentrant production processes over many heterogeneous machine groups with stringent performance requirements. Efficient composition of good scheduling policies from combinatorial options of wafer release and machine dispatching rules has posed a significant challenge to competitive fab operations. In this paper, we design a fast simulation-based methodology by an innovative integration of ordinal optimization (OO) and design of experiments (DOEs) to efficiently select a good scheduling policy for fab operations. Instead of finding the exact performance among scheduling policies, our approach compares their relative orders of performance to a specified level of confidence. Our new approach consists of three stages: performance estimation model construction using DOE, policy option screening process, and final simulation evaluation with intelligent computing budget allocation. The exponential convergence of OO is integrated into all the three stages to significantly improve computational efficiency. Simulation results of applications to scheduling wafer fabrications not only screen out good scheduling policies but also provide insights about how factors such as wafer release and the dispatching of each machine group may affect production cycle times and smoothness under a reentrant process flow. Most of the OO-based DOE simulations require 2-3 orders of magnitude less computation time than those of a traditional approach. Such a high speedup enables decision makers to explore much larger problems.Note to Practitioners- This paper designs a fast simulation-based methodology to compose a good scheduling policy from various dispatching rules of fab operations. The methodology innovatively applies DOE to estimate performance of dispatching rule combinations (policies) over various machines groups in a fab, screens out good enough policy options by using OO over the performance estimation, and allocates computation time intelligently to simulate potentially good options. Our study shows that OO-based DOE simulations require 2-3 orders of magnitude less computation time than those of a traditional approach. The high speedup enables fab managers to identify good scheduling policies from the many combinations of wafer release and dispatching rules.

In a fab with heterogeneous machine groups, the number of scheduling policies grows in a combinatorial way because each machine group has its specific dispatching rules. In this paper, we design a fast simulation methodology by an innovative combination of the notions of ordinal optimization (OO) and design of experiments (DOE) to efficiently select a good scheduling policy for fab operation, Instead of finding the exact performance among scheduling policies, our approach compares their relative orders of performance to a specified level of confidence. The DOE method is exploited to largely reduce the number of scheduling policies to be evaluated by the OO-based simulation. Simulation results of applications to scheduling wafer fabrications show that most of the OO-based DOE simulations require 2 to 3 orders of magnitude less computation time than those of traditional approach, and the speedup is up to 7,000 times in certain cases.

We exploit the speed of an ordinal optimization (OO)-based simulation tool designed by Hsieh et al. (1999) to investigate dynamic selection of scheduling rules for semiconductor wafer fabrication (FAB). Although a scheduling rule is a combination of loading wafer release and dispatching rules, this paper specifically focuses on dispatching when significant amount of wafers-in-process are held due to engineering causes and when major machine failures occur. Four prominent dispatching rules combined with the wafer release policy of workload regulation constitute a basic set of rule options. The dispatching rule may be weekly selected based on FAB states over a four-week horizon. A total of 756 rule options are then evaluated and ranked by the OO-based simulation tool under the performance index of mean cycle time and throughput rate. Results demonstrate the value of dynamic rule selection for uncertainty handling, the insightful selection of good rules and the needs for further research.

Computational efficiency is one of the major challenges of applying simulation to short-term operation scheduling of semiconductor wafer fabrication factories (fabs), which are characterized by re-entrant process flows, stringent production control requirements and fast changing technology and business environments. The paper explores the application of the ordinal optimization (OO)-based simulation technique to efficiently selecting good rules for scheduling wafer fabrications. An efficient simulation tool, which makes use of OO and optimal computing budget allocation techniques, is developed. Experiments with the OO-based simulation tool are conducted for static selection of good rules under different factors such as initial state, performance index and time horizon. Results indicate that one to two orders of computation time reduction over traditional simulations can be achieved and that what rules are good varies with factors of initial state, performance index and time horizon. These results motivate our further investigation about applications to dynamic selection of dispatching rules upon the occurrence of two significant uncertain events: holding of significant amount of wafers-in-process due to engineering causes and major machine failures. Results demonstrate the value of dynamic rule selection for uncertainty handling, the insightful selection of good rules and the needs for future research.