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John Giraldi

dblp:83/5569 · DBLP profile ↗
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4ranked-venue papers
2as first author
0since 2021 · last 1997
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 4 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
hardware verification and test
0.011990
EST: The New Frontier in Automatic Test-Pattern Generation · DAC 1990
Electronic design automation › hardware verification and test
test generation
0.011990
EST: The New Frontier in Automatic Test-Pattern Generation · DAC 1990
Electronic design automation › logic synthesis › logic minimization
boolean function minimization
0.011989
Minimizability of Random Boolean Functions · IEEE Trans. Computers 1989
Electronic design automation
logic synthesis
0.011989
Minimizability of Random Boolean Functions · IEEE Trans. Computers 1989

Methods — techniques the papers use, named apart from their topics

equivalent state detection · 0.0binary decision diagram · 0.0random clumping theory · 0.0geometric analysis · 0.0
YearPublicationVenuePosition
1997 A Functional Decomposition Method for Redundancy Identification and Test Generation
Michael L. Bushnell, John Giraldi
J. Electron. Test.2
1991 Search State Equivalence for Redundancy Identification and Test Generation
abstract
We present new extensions to the EST' algoritlm, which accelerates combinational circuit Redundancy Identification and Automatic Test Pattern Generation (ATPG) algorithms, in particular SOCRATES. EST detects equivalent search states, which are saved. for all faults during ATPG. The search space is reduced by using learned Search State equiualences to detect previously-encountered search states (possibly from prior faults) and to make internal node assignments. We present two extensions to EST. The first ensures that each portion of the ATPG search space is explored only once. The second applies headline objectives in parallel, rather than serially. For the 1965 ISCAS combinational benchmarks, EST accelerates S 0 CRATES by 6.53 times, when all faults are targeted, and by 5.51 times, when used with random pattern generation, f,iult simulation and fault dropping. This acceleration was achieved with minimal memory overhead.
John Giraldi, Michael L. Bushnell
ITC1
1990 EST: The New Frontier in Automatic Test-Pattern Generation
abstract
We present a new algorithm, EST, that accelerates any combinatorial circuit Automatic Test-Pattern Generation algorithm. EST detects equivalent search states, which are saved for all faults during ATPG. The search space is reduced by using Binary Decision Diagram fragments to detect previously-encountered search states (possibly from prior faults). Search terminates earlier than before. Redundant fault analysis further accelerates ATPG. ATPG is accelerated 1347 times for hard-to-test faults in the ISCAS '85 benchmarks.
John Giraldi, Michael L. Bushnell
DAC1
1989 Minimizability of Random Boolean Functions
abstract
The average number of prime k-cubes and essential k-cubes in an n-variable, single-output Boolean function has already been obtained combinationally. The authors show how the same quantities can be obtained geometrically, using the theory of random clumping and take an initial step in calculating, for k-cubes in the minimized form of a function. The authors compare their results to minimizations produced by ESPRESSO and a cruder algorithm.>
Harold Fleisher, John Giraldi, R. Phoenix, Morton Tavel
IEEE Trans. Computers2