Arun Raghunath

dblp:83/5750 · DBLP profile ↗
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7ranked-venue papers
2as first author
1since 2021 · last 2026
0009-0007-3314-7438ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 4 · 1 first-author · 1 since 2021Software engineering, systems software and programming languages · 2Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Distributed systems · 41% Storage systems · 41% High-performance computing · 12%
Software engineering, system software, and programming languages
2 papers
Program synthesis and code generation · 46% Operating systems · 44% Software maintenance and evolution · 9%

Topics — the 7 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems › networked storage › storage networking
NVMe over Fabrics
1.012026
Direct File Path Access with NVMe over Fabrics for High-Performance Remote Data Reads · INFOCOM 2026
Distributed systems › distributed communication
remote data access
1.012026
Direct File Path Access with NVMe over Fabrics for High-Performance Remote Data Reads · INFOCOM 2026
Program synthesis and code generation › domain-specific code generation
device driver synthesis
0.212014
User-Guided Device Driver Synthesis · OSDI 2014
Operating systems › i/o › i/o subsystem › device drivers
device driver reliability
0.112011
Improved device driver reliability through hardware verification reuse · ASPLOS 2011
Electronic design automation › hardware verification and test
hardware verification
0.112011
Improved device driver reliability through hardware verification reuse · ASPLOS 2011
Operating systems › i/o › i/o subsystem
device drivers
0.112014
User-Guided Device Driver Synthesis · OSDI 2014
Software maintenance and evolution
software cost reduction
0.012011
Improved device driver reliability through hardware verification reuse · ASPLOS 2011

Methods — techniques the papers use, named apart from their topics

hardware verification reuse · 0.2
YearPublicationVenuePosition
2026 Direct File Path Access with NVMe over Fabrics for High-Performance Remote Data Reads
Arun Raghunath
INFOCOM2
2020 On Evolving Software Defined Storage Architecture
abstract
Software Defined Storage (SDS) architectures offer storage services on standard high-volume servers by providing durability, availability, reliability and on-demand scale-out elasticity. To meet different application needs, various storage interfaces like block, file, object are provided, as well as higher level interfaces like streaming write-ahead-logs, and NoSQL databases. Typically, each SDS service is implemented as an independent distributed framework, often with redundant capabilities intertwined with service-specific functions within a monolithic stack. Such monolithic SDS architectures prevent the benefits of new storage media and protocol innovations from reaching the applications using SDS services. In this paper, we advocate for a decoupled architecture by redefining the boundaries of separation within SDS. We describe an instantiation of this architecture built using a popular open-source SDS, where the SDS back-end is decoupled. Evaluation results demonstrate a 99% and 35% bandwidth consumption reduction in cluster network and total network respectively, as well as up to a 35% latency reduction, in a disaggregated storage environment just via careful decoupling. We discuss the benefits of this approach in the context of containerization for agility, scaling NVMe-oF and leveraging emerging storage accelerators.
Arun Raghunath, Anjaneya Chagam
CloudCom1
2014 User-Guided Device Driver Synthesis
Leonid Ryzhyk, John Keys, Alexander Legg, Arun Raghunath, Michael Stumm, Mona Vij
OSDI5
2011 Improved device driver reliability through hardware verification reuse
abstract
Faulty device drivers are a major source of operating system failures. We argue that the underlying cause of many driver faults is the separation of two highly-related tasks: device verification and driver development. These two tasks have a lot in common, and result in software that is conceptually and functionally similar, yet kept totally separate. The result is a particularly bad case of duplication of effort: the verification code is correct, but is discarded after the device has been manufactured; the driver code is inferior, but used in actual device operation. We claim that the two tasks, and the software they produce, can and should be unified, and this will result in drastic improvement of device-driver quality and reduction in the development cost and time to market.
Leonid Ryzhyk, John Keys, Balachandra Mirla, Arun Raghunath, Mona Vij, Gernot Heiser
ASPLOS4
2009 Parallelization of Snort on a multi-core platform
abstract
We design and test a multithreaded Snort which uses flow pinning as a major optimization. The insights derived in improving Snort's performance will apply generally to any parallel networking application that uses flow pinning as an optimization.
Ben Wun, Patrick Crowley, Arun Raghunath
ANCS3
2008 Design of a scalable network programming framework
abstract
Nearly all programmable commercial hardware solutions offered for high-speed networking systems are capable of meeting the performance and flexibility requirements of equipment vendors. However, the primary obstacle to adoption lies with the software architectures and programming environments supported by these systems. Shortcomings include use of unfamiliar languages and libraries, portability and backwards compatibility, vendor lock-in, design and development learning curve, availability of competent developers, and a small existing base of software. Another key shortcoming of previous architectures is that either they are not multi-core oriented or they expose all the hardware details, making it very hard for programmers to deal with. In this paper, we present a practical software architecture for high-speed embedded systems that is portable, easy to learn and use, multicore oriented, and efficient.
Ben Wun, Patrick Crowley, Arun Raghunath
ANCS3
2005 Framework for supporting multi-service edge packet processing on network processors
abstract
Network edge packet-processing systems, as are commonly implemented on network processor platforms, are increasingly required to support a rich set of services. These multi-service systems are also subjected to widely varying and unpredictable traffic. Current network processor systems do not simultaneously deal well with a variety of services and fluctuating workloads. For example, current methods of worst-case, static provisioning can meet performance requirements for any workload, but provisioning each service for its worst case reduces the total number of services that can be supported. Alternately, profile-driven automatic-partitioning compilers create efficient binaries for multi-service applications for specific workloads but they are sensitive to workload fluctuations.Run-time adaptation is a potential solution to this problem. With run-time adaptation, the mapping of services to system resources can be dynamically adjusted based on the workload. We have implemented an adaptive system that automatically changes the mapping of services to processors, and handles migration of services between different processor core types to match the current workload. In this paper we explain our adaptive system built on the Intel® IXP2400 network processor. We demonstrate that it outperforms multiple different profile-driven compiled solutions for most workloads and performs within 20% of the optimal compiled solution for the remaining workloads.
Arun Raghunath, Aaron R. Kunze, Erik J. Johnson, Vinod Balakrishnan
ANCS1