Xi Xiao 0004

dblp:83/6642-4 · DBLP profile ↗
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5ranked-venue papers
0as first author
3since 2021 · last 2023
0000-0003-3696-877XORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 3 since 2021
YearPublicationVenuePosition
2023 Multi-Wavelength Parallel Training and Quantization-Aware Tuning for WDM-Based Optical Convolutional Neural Networks Considering Wavelength-Relative Deviations
abstract
Wavelength Division Multiplexing (WDM)-based Mach-Zehnder Interferometer Optical Convolutional Neural Networks (MZI-OCNNs) have emerged as a promising platform to accelerate convolutions that cost most computing sources in neural networks. However, the wavelength-relative imperfect split ratios and actual phase shifts in MZIs and quantization errors from the electronic configuration module will degrade the inference accuracy of WDM-based MZI-OCNNs and thus render them unusable in practice. In this paper, we propose a framework that models the split ratios and phase shifts under different wavelengths, incorporates them into OCNN training, and introduces quantization-aware tuning to maintain inference accuracy and reduce electronic module complexity. Consequently, the framework can improve the inference accuracy by 49%, 76%, and 76%, respectively, for LeNet5, VGG7, and VGG8 implemented with multi-wavelength parallel computing. And instead of using Float 32/64 quantization resolutions, only 5,6, and 4 bits are needed and fewer quantization levels are utilized for configuration signals.
Min Liu 0021, Lei Wang 0187, Xi Xiao 0004, Shaohua Yu
ASP-DAC5
2022 Design of a PAM-4 VCSEL-Based Transceiver Front-End for Beyond-400G Short-Reach Optical Interconnects
abstract
This paper presents a hybrid-integrated optical transceiver front-end for beyond-400G short-reach optical links. A pair of the monolithic 8-channel laser drivers and the trans-impedance amplifier (TIA) is developed in 180nm SiGe BiCMOS, incorporating arrayed Vertical-Cavity-Surface- Emitting Lasers and photo-detectors. The driver uses a$2^{\mathrm {nd}}$-order continuous-time linear equalizer (CTLE) to compensate for the channel loss with a nonlinear frequency response. Both the inductive peaking and RC-degeneration are embedded at the output stage to extend the optical modulation bandwidth (BW). The series-peaking and multi-stage distributed CTLE are combined in a resistive feedback TIA topology for improved BW and linearity. Measurement results show up to 100-Gb/s PAM-4 electrical eyes of the driver and TIA. The optical transmitter front-end operates 56 Gb/s, 4.1-dB extinction ratio, and 6.6-pJ/bit power efficiency, while the optical receiver front-end achieves 56-Gb/s,$10^{-6}$bit error rate, and 5.9-pJ/bit power efficiency.
Donglai Lu, Haiyun Xue, Sikai Chen, Leliang Li, Guike Li, Zhao Zhang 0004, Jian Liu 0021, Nanjian Wu, Ningmei Yu, Fengman Liu, Xi Xiao 0004, Yong Chen 0005, Nan Qi 0002
IEEE Trans. Circuits Syst. I Regul. Pap.14
2022 A 56-Gb/s Reconfigurable Silicon-Photonics Transmitter Using High-Swing Distributed Driver and 2-Tap In-Segment Feed-Forward Equalizer in 65-nm CMOS
abstract
This article presents a reconfigurable silicon- photonics transmitter (TX) for short-reach optical interconnects. The proposed hybrid-integrated TX combines a 65-nm CMOS driver with a 180-nm SOI-CMOS silicon-photonic Mach-Zehnder Modulator (MZM). The driver integrated with in- segment fractional-UI spaced feed-forward equalizer (FFE) is proposed to support the non-return-zero (NRZ) signaling, electrical- and optical-domain 4-level pulse-amplitude modulation (PAM-4) signaling. The driver employs a reconfigurable distributed topology to achieve high swing, wide bandwidth and flexible operation. The MZM is driven differentially in a push-pull configuration for high modulation efficiency. Measurement results show that the proposed TX operates up to 50-Gb/s NRZ data rate with 4-Vppd swing and 1.92-ps RMS jitter. In the optical PAM-4 mode, it reaches 56-Gb/s data rate and achieves >5-dB extinction ratio (ER) at the cost of 10.9-pJ/bit power efficiency.
Yuguang Zhang, Qiwen Liao, Zhao Zhang 0004, Miaofeng Li, Jingbo Shi, Jian Liu 0021, Nanjian Wu, Yong Chen 0005, Patrick Chiang 0001, Ningmei Yu, Xi Xiao 0004, Nan Qi 0002
IEEE Trans. Circuits Syst. I Regul. Pap.14
2020 A 50Gb/s PAM-4 Optical Receiver with Si-Photonic PD and Linear TIA in 40nm CMOS
abstract
A 50Gb/s PAM-4 optical receiver with Silicon Photonic (Si-Ph) photodiode (PD) and CMOS linear transimpedance amplifier (TIA) is presented. To optimize both noise and bandwidth, a two-stage front-end architecture-a high gain-low bandwidth TIA followed by a two-stage continuous time linear equalizer (CTLE) is adopted. Gain adjustment of the entire link is achieved by adjusting the TIA feedback resistor and the voltage of variable gain amplifier (VGA) to ensure that the receiver analog front-end (AFE) remains linear over the entire photocurrent input range. The chip has been realized in 40nm CMOS process. Experimental results show the TIA achieves 66dBΩ transimpedance gain, 24.4GHz bandwidth, 20dB gain dynamic range, maximum overload current 2mA, and differential output swing of 400mV. The total power consumption of the chip is 125.4mW.
Yang Liu 0178, Nan Qi 0002, Xiuli Xu, Lei Wang 0187, Minjia Chen, Qixiang Cheng, Jingbo Shi, Jian Liu 0021, Xi Xiao 0004, Nanjian Wu
ISCAS11
2018 A Time-Division-Multiplexing Scheme for Simultaneous Wavelength Locking of Multiple Silicon Micro-Rings
abstract
This paper presents a time-division-multiplexing (TDM) scheme for simultaneous wavelength locking of multiple silicon micro-rings by exploiting the speed mismatch between the heater and the controller. This scheme could reduce the overall chip size significantly without reducing the wavelength lock speed. It also avoids cross-channel coupling using the least number of ADCs and DACs. The simplest TDM scheme involving two micro-rings is experimentally verified using board-level circuits. Theoretically, this approach can be scaled to even hundreds of micro-rings, pointing out a way towards large-scale integrated optoelectronics, which is required by many important applications, such as wavelength division multiplexing for chip-to-chip optical I/O.
Zhicheng Wang 0008, Yu Yu 0005, Xi Xiao 0004, Miaofeng Li, Xuecheng Zou, Dingshan Gao, Min Tan 0004
ISCAS3