Web-based management solutions have become an increasingly important and promising approach especially for small and embedded environments. This article presents the design and implementation of an embedded system that leverages the Web-based enterprise management (WBEM) solution. WBEM has been designed to manage large heterogeneous environments but has not yet been deployed on small and embedded devices. First, we evaluate existing WBEM implementations due to its resource requirements. Second, we describe the design of an embedded network device that has been realized on a system-on-chip prototyping platform. A small-footprint WBEM server has been integrated that requires less than 900 kB of non-volatile memory. We provide performance measurements of our solution and compare the results with other Web-based management approaches. They show that WBEM is suitable to run on such resource-constraint devices and to be applicable in practice.

We present a fully operable security gateway prototype, integrating quantum key distribution and realised as a system-on-chip. It is implemented on a field-programmable gate array and provides a virtual private network with low latency and gigabit throughput. The seamless hard- and software integration of a quantum key distribution layer enables high key-update rates for the encryption modules. Hence, the amount of data encrypted with one session key can be significantly decreased. We realise a highly modular architecture and make extensive use of software/hardware partitioning. This work is the first approach towards application of a new key distribution technology in dedicated security processors. In particular, it elaborates requirements for the integration of quantum key distribution on a chip level.

The implementation of security protocols in RFID systems is challenging because of the fierce constraints concerning power consumption and low die size of RFID tags. The choice of the appropriate cryptographic primitive is difficult because there are many different algorithms available and the design options for each are manifold. In this paper, we analyze the standardized cryptographic algorithms SHA-256, SHA-1, MD5, AES-128, and ECC-192 in terms of implementation efficiency. The three parameters mean power consumption, chip area, and the number of clock cycles, are used to introduce a metric for a fair comparison of different hardware implementations. We describe the implementations of the five modules which were optimized for application in passive RFID tags and compare their results. We give conclusive evidence that the use of AES in RFID systems is most appropriate today

This paper presents the design of a special purpose processor with Elliptic Curve Digital Signature Algorithm (ECDSA) functionality. This digital signature generation device (SGD) was developed especially for RFID tags. The design parameters were low energy consumption, small chip area, robustness against cryptographic attacks, and flexibility. The SGD was designed to work as digital processor in an RFID tag requiring the tag to provide the secret key storage and a PRNG. The SHA-1 calculation needs to be included into the SGD to avoid a microcontroller on the tag. The asymmetric cryptosystem allows authentication of the tag to untrusted third parties without revealing the secret key. The ECDSA functionality was implemented using a prime field GF(p) and affine coordinates, an alternative way to reduce the die size and the costs of the tag. The standard-cell based implementation of the device is fully scalable for different prime fields sizes. The GF(p192) version will need 23k gate equivalents or 1.3 mm2for a 0.35μm process. 502k clock cycles are used for signature generation. The near-Spice level power simulation with Nanosim estimated the final energy consumption to 0.846 mWs for a generated signature.