Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

An-Jui Shey

dblp:84/1909 · DBLP profile ↗
← Back
3ranked-venue papers
0as first author
0since 2021 · last 2008
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 64% Integrated circuit design · 36%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › technology computer-aided design
device simulation
0.011989
Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Electronic design automation › technology computer-aided design › device simulation
numerical device simulation
0.011989
Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Integrated circuit design › analog and mixed-signal circuits
analog circuit design
0.011988
ADIC-2.C a general-purpose optimization program suitable for integrated circuit design applications using the pseudo objective function substitution method (POSM) · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › logic synthesis
circuit optimization
0.011988
ADIC-2.C a general-purpose optimization program suitable for integrated circuit design applications using the pseudo objective function substitution method (POSM) · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Integrated circuit design › analog and mixed-signal circuits
device modeling
0.011989
Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Integrated circuit design
semiconductor devices
0.011989
Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1989
Integrated circuit design
analog and mixed-signal circuits
0.011988
ADIC-2.C a general-purpose optimization program suitable for integrated circuit design applications using the pseudo objective function substitution method (POSM) · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988
Electronic design automation › design optimization
circuit design optimization
0.011988
ADIC-2.C a general-purpose optimization program suitable for integrated circuit design applications using the pseudo objective function substitution method (POSM) · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1988

Methods — techniques the papers use, named apart from their topics

scharfetter-gummel scheme · 0.0gaussian quadrature · 0.0finite element method · 0.0second-order approximation · 0.0pseudo-objective function substitution method · 0.0
YearPublicationVenuePosition
2008 Incorporating logic exclusivity (LE) constraints in noise analysis using gain guided backtracking method
abstract
Crosstalk noise becomes one of the critical issues gating design closure for nano-meter designs. Pessimism in noise analysis can lead to significant additional time spent addressing false violations. Taking logic correlation into consideration, noise analysis can reduce pessimism significantly by eliminating false noise signals [1]-[3][5]-[7][10]-[13]. Eliminating the aggressors from the aggressor candidate set that can not switch simultaneously restricted by the logic exclusivity (LE) relationship among them can save simulation time as well. The LE problem, being proved as NP-complete, is basically to determine the subset (possibly multiple equivalent subsets) of a given aggressor candidate set which has the largest combined weight out of all possible subsets governed by logic exclusivity constraints. This paper presents a new approach in resolving the LE problem, which employs a gain guided backtrack search technique that does not require exhaustive search of all the binary paths to reach an optimal solution. We first prove that under certain conditions, if the gain at each level is non-negative, then the result will be optimal. Based on this theorem, a new algorithm is developed. The experimental results demonstrate the efficiency and accuracy of this approach. The algorithm can quickly find the optimal solutions for most cases from industry designs and outperforms other methods.
Ruiming Li, An-Jui Shey, Michel Laudes
ICCAD2
1989 Two-dimensional semiconductor device analysis based on new finite-element discretization employing the S-G scheme
abstract
To make the application of the finite-element method practical in semiconductor device simulation, the authors have applied the Scharfetter-Gummel (S-G) scheme in conjunction with an accurate seven-point Gaussian quadrature rule to the assembly of the finite-element stiffness matrices and the right-hand-side vector of the semiconductor equations. The key of this method lies in accurate interpolation rules, which are derived on the basis of simple device physics considerations. The inherent simplicity and flexibility in the finite element formulation make the new method applicable to multidimensional problems. The simplicity of embedding the S-G scheme in the quadrature of finite-element assembly lends itself to all kinds of finite-element methods using various elements, shape functions, and weightings. The resultant exponential functional fitting avoids high discretization errors usually incurred by the classical finite-element discretization method. Solutions with high accuracy, even on coarse mesh, and a significant speed-up of convergence rate are obtained.>
Gen-Lin Tan, Xiao-Li Yuan, Qi-Ming Zhang, Walter H. Ku, An-Jui Shey
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.5
1988 ADIC-2.C a general-purpose optimization program suitable for integrated circuit design applications using the pseudo objective function substitution method (POSM)
abstract
POSM (pseudo-objective function substitution method), is an unconstrained optimization algorithm. This algorithm, requiring neither derivative calculation nor linear search step, substitutes the objective function by a second-order approximated formulation, enhancing the convergence rate substantially and implemented in the general-purpose Analysis and Design Program for Integrated Circuits, (ADIC-2.C). To show the effectiveness and efficiency of this algorithm, it was evaluated using a number of numerical examples and some practical IC designs.>
Gen-Lin Tan, Shao-Wei Pan, Walter H. Ku, An-Jui Shey
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.4