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A. Romano

dblp:84/3467 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 1987
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
physical design
0.011987
A Tile-Expansion Router · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Electronic design automation › physical design
routing
0.011987
A Tile-Expansion Router · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987
Electronic design automation › physical design › design planning
chip planning
0.011987
A Tile-Expansion Router · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 1987

Methods — techniques the papers use, named apart from their topics

working tree search · 0.0corner stitching data structure · 0.0
YearPublicationVenuePosition
1987 A Tile-Expansion Router
abstract
A router based on a tile-expansion algorithm and corner stitching data structure is presented. This program finds connections with a minimum number of jogs and it ensures that a possible solution will be found. Using a working tree, it allows an exhaustive and recursive search along all available areas for routing. The connections are made going back through the working tree until the starting terminal is reached. There are two Manhattan layers that the user can choose for each direction to implement connections; the router can be used to wire hierarchical blocks using a chip planning methodology. The program has been successfully tested on examples concerning different classes of problems.
A. Margarino, A. Romano, Alessandro De Gloria, Francesco Curatelli, P. Antognetti
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2