Shared memory and message passing are two opposing communication models for parallel multicomputer architectures. Comparing such architectures has been difficult, because applications must be hand-crafted for each architecture, often resulting in radically different sources for comparison. While it is clear that shared memory machines are currently easier to program, in the future, programs will be written in high-level languages and compiled to the specific parallel target, thus eliminating this difference. The authors evaluate several parallel architecture alternatives, message passing, NUMA, and cache-coherent shared memory, for a collection of scientific benchmarks written in C*, a data-parallel language. Using a single suite of C* source programs, they compile each benchmark and simulate the interconnect for the alternative models. The objective is to examine underlying, technology-independent costs inherent in each alternative. The results show the relative work required to execute these data parallel programs on the different architectures, and point out where some models have inherent advantages for particular data-parallel program styles.>

The data-parallel programming model provides high-level abstraction.

Examines the generation of parallel evaluators for attribute grammars, targeted to shared-memory MIMD computers. Evaluation-time overhead due to process scheduling and synchronization is reduced by detecting coarse-grain parallelism (as opposed to the naive one-process-per-node approach). As a means to more clearly expose inherent parallelism, it is shown how to automatically transform productions of the form X to Y X into list-productions of the form X to Y/sup +/. This transformation allows for many simplifications to be applied to the semantic rules, which can expose a significant degree of inherent parallelism, and thus further increase the evaluator's performance. Effectively, this constitutes an extension of the concept of attribute grammars to the level of abstract syntax.>

Article An architecture for software-controlled data prefetching Share on Authors: Alexander C. Klaiber University of Washington, Seattle, WA University of Washington, Seattle, WAView Profile , Henry M. Levy University of Washington, Seattle, WA University of Washington, Seattle, WAView Profile Authors Info & Claims ISCA '91: Proceedings of the 18th annual international symposium on Computer architectureApril 1991 Pages 43–53https://doi.org/10.1145/115952.115958Online:01 April 1991Publication History 133citation673DownloadsMetricsTotal Citations133Total Downloads673Last 12 Months17Last 6 weeks0 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteGet Access