This paper examines the effect of contention for a single shared semaphore protecting critical regions in a multiprocessor operating system on system performance as the number of processors increases. A simple queueing model is used to make predictions as a function of the expected demand for the semaphore by each processor. Measurements are then presented for 2 and 4 processor configurations of the CRAY X-MP running an experimental version of UNICOS. The measurements indicate that demand is highly dependent on the workload, and that contention can be somewhat higher than predicted by the model due to process scheduling effects and request interdependencies. One interesting point which is revealed in the measurement results, is that the UNIX scheduler gives preferential treatment to jobs that make frequent requests for the semaphore.

In this paper, the WISQ architecture is described. This architecture is designed to achieve high performance by exploiting new compiler technology and using a highly segmented pipeline. By having a highly segmented pipeline, a very-high-speed clock can be used. Since a highly segmented pipeline will require relatively long pipelines, a way must be provided to minimize the effects of pipeline bubbles that are formed due to data and control dependencies. It is also important to provide a way of supporting precise interrupts. These goals are met, in part, by providing a reorder buffer to help restore the machine to a precise state. The architecture then makes the pipelining visible to the programmer/compiler by making the reorder buffer accessible and by explicitly providing that issued instructions cannot be affected by immediately preceding ones. Compiler techniques have been identified that can take advantage of the reorder buffer and permit a sustained execution rate approaching or exceeding one per clock. These techniques include using trace scheduling and providing a relatively easy way to “undo” instructions if the predicted branch path is not taken. We have also studied ways to further reduce the effects of branches by not having them executed in the execution unit. In particular, branches are detected and resolved in the instruction fetch unit. Using this approach, the execution unit is sent a stream of instructions (without branches) that are guaranteed to execute.