This paper proposes a high-speed software-based platform for embedded software and evaluates its benefits on a commercial MPEG-2 video encoder LSI with HDTV scalability, The platform is written in C/C++ languages without any hardware description languages (HDLs) for high-speed simulation. This platform is applicable before writing up complete HDLs. The simulation speed is very fast and more than 600 times faster than compiled HDL simulators using RTL description. Fifty percent of the bugs in the final embedded software were located efficiently and quickly, and the design turn-around time was shortened by more than 25%. This platform provides sufficient performance and capability for validating practical embedded software.

A high-speed two-dimensional (2-D) topography simulator which operates in X-Windows has been developed. This program, named TIGER (Topography Image GEneration Routine), uses a newly developed pixel model, in which regions of the same material are depicted by pixels with the same value (i.e. the same color) and material boundaries are regarded as color boundaries. New cross-sectional profiles are sequentially created by drawing basic geometrical figures on a cross-sectional profile of a former process step. No complex operations are required for boundary line definition, such as loop removal. Realistic cross sections of an LSI with three interconnection layers and an SST transistor with a complex structure were created by this simulator. The total simulation time is only one or two minutes for all the processing steps of an LSI.

A description is given of a method for handshapes of the Japanese manual alphabet (JMA) based on their contour features. JMA has 46 patterns each of which represents a voiceless sound of the Japanese spoken language. Since 5 fingerspellings have motion, the authors adopt a set of 41 fingerspellings.>