Demo Data from EDBT 2026 / reviewers in the wild / expert
Robert Piloty
dblp:84/4907
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 1982
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Electronic design automation · 94% Performance modeling and evaluation · 6% | |
| Software engineering, system software, and programming languages
1 paper |
Programming languages and type systems · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Programming languages and type systems
language design |
0.0 | 1 | 1982 | The conlan project: Status and future plans · DAC 1982 |
Electronic design automation
hardware description language |
0.0 | 1 | 1982 | The conlan project: Status and future plans · DAC 1982 |
Electronic design automation › hardware verification and test
hardware verification |
0.0 | 1 | 1975 | Design Verification at the Register Transfer Language Level · IEEE Trans. Computers 1975 |
Electronic design automation › hardware verification and test › functional verification
RTL verification |
0.0 | 1 | 1975 | Design Verification at the Register Transfer Language Level · IEEE Trans. Computers 1975 |
Performance modeling and evaluation › simulation
concurrent simulation |
0.0 | 1 | 1975 | Design Verification at the Register Transfer Language Level · IEEE Trans. Computers 1975 |
Methods — techniques the papers use, named apart from their topics
formal language construction mechanism · 0.0functional-structural comparison · 0.0concurrent simulation · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1982 | The conlan project: Status and future plansabstractCONLAN (CONsensus LANguage) is a general formal language construction mechanism for the description of hard- and firmware at different levels of abstraction. It has been developed by the international CONLAN Working Group. Members of the CONLAN language family are derived from a common root language called BCL (Base ConLan). This language provides the basic object types and operations to describe the behavior and the structure of digital systems in space and time. The paper is based on the CONLAN Draft Report (in print). The purpose of the paper is (1) to provide an informal introduction to the Draft Report version of BCL together with examples of its application (2) to outline some work on the derivation of languages from BCL and (3) to describe status and further plans for software tools supporting language derivation and implementation. Robert Piloty, Dominique Borrione |
DAC | 1 |
| 1975 | Design Verification at the Register Transfer Language LevelabstractComputer description languages can be used as input to software tools which aid in the design of digital hardware structures. One of the important phases in the design process is verification. A software system is described which aids the verification process of a computer description at the register transfer language (RTL) leveL. It is based on the concept of concurrent simulation and comparison of the functional and the structural description of a computer. Error types, in particular consistency and semantic errors, and algorithms for their detection are discussed. The tools necessary to implement these detection procedures are outlined. Harold Hoehne, Robert Piloty |
IEEE Trans. Computers | 2 |