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Ravi Hosabettu

dblp:84/5218 · DBLP profile ↗
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5ranked-venue papers
3as first author
0since 2021 · last 2003
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Theory of computation · 5 · 3 first-authorSoftware engineering, systems software and programming languages · 3 · 2 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Electronic design automation · 75% Processor architecture and microarchitecture · 25%

Topics — the 5 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test
formal verification		 0.022000
Verifying Advanced Microarchitectures that Support Speculation and Exceptions · CAV 2000
Decomposing the Proof of Correctness of pipelined Microprocessors · CAV 1998
Electronic design automation
hardware verification and test		 0.022000
Verifying Advanced Microarchitectures that Support Speculation and Exceptions · CAV 2000
Decomposing the Proof of Correctness of pipelined Microprocessors · CAV 1998
Electronic design automation › hardware verification and test › processor verification
microarchitecture verification		 0.012000
Verifying Advanced Microarchitectures that Support Speculation and Exceptions · CAV 2000
Processor architecture and microarchitecture › pipelining
pipelined processor		 0.011998
Decomposing the Proof of Correctness of pipelined Microprocessors · CAV 1998
Electronic design automation › hardware verification and test
processor verification		 0.011998
Decomposing the Proof of Correctness of pipelined Microprocessors · CAV 1998

Methods — techniques the papers use, named apart from their topics

formal verification · 0.0proof decomposition · 0.0
YearPublicationVenuePosition
2003 Formal Verification of a Complex Pipelined Processor
Ravi Hosabettu, Ganesh Gopalakrishnan, Mandayam K. Srivas
 Formal Methods Syst. Des.1
2000 Verifying Advanced Microarchitectures that Support Speculation and Exceptions
Ravi Hosabettu, Ganesh Gopalakrishnan, Mandayam K. Srivas
 CAV1
2000 Formalization and Analysis of a Solution to the PCI 2.1 Bus Transaction Ordering Problem
Abdelillah Mokkedem, Ravi Hosabettu, Michael D. Jones, Ganesh Gopalakrishnan
 Formal Methods Syst. Des.2
1998 Decomposing the Proof of Correctness of pipelined Microprocessors
Ravi Hosabettu, Mandayam K. Srivas, Ganesh Gopalakrishnan
 CAV1
1998 Formalization and Proof of a Solution to the PCI 2.1 Bus Transaction Ordering Problem
Abdelillah Mokkedem, Ravi Hosabettu, Ganesh Gopalakrishnan
 FMCAD2