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Thu Van Vu

dblp:84/5584 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1985
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
digital circuit design
0.011985
Efficient Implementations of the Chinese Remainder Theorem for Sign Detection and Residue Decoding · IEEE Trans. Computers 1985
Integrated circuit design
residue number system arithmetic
0.011985
Efficient Implementations of the Chinese Remainder Theorem for Sign Detection and Residue Decoding · IEEE Trans. Computers 1985
Integrated circuit design › digital arithmetic circuits
sign detection
0.011985
Efficient Implementations of the Chinese Remainder Theorem for Sign Detection and Residue Decoding · IEEE Trans. Computers 1985
YearPublicationVenuePosition
1985 Efficient Implementations of the Chinese Remainder Theorem for Sign Detection and Residue Decoding
abstract
Two conversion techniques based on the Chinese remainder theorem are developed for use in residue number systems. The new implementations are fast and simple mainly because adders modulo a large and arbitrary integer M are effectively replaced by binary adders and possibly a lookup table of small address space. Although different in form, both techniques share the same principle that an appropriate representation of the summands must be employed in order to evaluate a sum modulo M efficiently. The first technique reduces the sum modulo M in the conversion formula to a sum modulo 2 through the use of fractional representation, which also exposes the sign bit of numbers. Thus, this technique is particularly useful for sign detection and for any operation requiring a comparison with a binary fraction of M. The other technique is preferable for the full conversion from residues to unsigned or 2's complement integers. By expressing the summands in terms of quotients and remainders with respect to a properly chosen divisor, the second technique systematically replaces the sum modulo M by two binary sums, one accumulating the quotients modulo a power of 2 and the other accumulating the remainders the ordinary way. A final recombination step is required but is easily implemented with a small lookup table and binary adders.
Thu Van Vu
IEEE Trans. Computers1