Demo Data from EDBT 2026 / reviewers in the wild / expert
Robert P. Nix
dblp:84/6
· DBLP profile ↗
5ranked-venue papers
2as first author
0since 2021 · last 1993
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 3 · 2 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Processor architecture and microarchitecture · 100% | |
| Software engineering, system software, and programming languages
4 papers |
Compilers and program optimization · 57% Program synthesis and code generation · 43% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › instruction-level parallelism
VLIW |
0.0 | 2 | 1988 | A VLIW Architecure for a Trace Scheduling Compiler · IEEE Trans. Computers 1988 A VLIW Architecture for a Trace Scheduling Compiler · ASPLOS 1987 |
Processor architecture and microarchitecture
instruction-level parallelism |
0.0 | 2 | 1988 | A VLIW Architecure for a Trace Scheduling Compiler · IEEE Trans. Computers 1988 A VLIW Architecture for a Trace Scheduling Compiler · ASPLOS 1987 |
Program synthesis and code generation
programming by example |
0.0 | 2 | 1985 | Editing by Example · ACM Trans. Program. Lang. Syst. 1985 Editing by Example · POPL 1984 |
Compilers and program optimization
instruction scheduling |
0.0 | 1 | 1988 | A VLIW Architecure for a Trace Scheduling Compiler · IEEE Trans. Computers 1988 |
Processor architecture and microarchitecture › superscalar processor
wide-issue |
0.0 | 1 | 1988 | A VLIW Architecure for a Trace Scheduling Compiler · IEEE Trans. Computers 1988 |
Compilers and program optimization › instruction scheduling
trace scheduling |
0.0 | 1 | 1987 | A VLIW Architecture for a Trace Scheduling Compiler · ASPLOS 1987 |
Methods — techniques the papers use, named apart from their topics
load/store architecture · 0.0compiler-controlled resource usage · 0.0trace scheduling · 0.0program synthesis · 0.0heuristic search · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1993 | The multiflow trace scheduling compiler
P. Geoffrey Lowney, Stefan M. Freudenberger, Thomas J. Karzes, Woody Lichtenstein, Robert P. Nix, John S. O'Donnell, John C. Ruttenberg |
J. Supercomput. | 5 |
| 1988 | A VLIW Architecure for a Trace Scheduling CompilerabstractA VLIW (very long instruction word) architecture machine called the TRACE has been built along with its companion Trace Scheduling compacting compiler. This machine has three hardware configurations, capable of executing 7, 14, or 28 operations simultaneously. The 'seven-wide' achieves a performance improvement of a factor of five or six for a wide range of scientific code, compared to machines of higher cost and fast chip implementation technology (such as the VAX 8700). The TRACE extends some basic reduced-instruction-set computer (RISC) precepts: the architecture is load/store, the microarchitecture is exposed to the compiler, there is no microcode, and there is almost no hardware devoted to synchronization, arbitration, or interlocking of any kind (the compiler has sole responsibility for run-time resource usage). The authors discuss the design of this machine and present some initial performance results.> Robert P. Colwell, Robert P. Nix, John J. O'Donnell, David B. Papworth, Paul K. Rodman |
IEEE Trans. Computers | 2 |
| 1987 | A VLIW Architecture for a Trace Scheduling CompilerabstractVery Long Instruction Word (VLIW) architectures were promised to deliver far more than the factor of two or three that current architectures achieve from overlapped execution. Using a new type of compiler which compacts ordinary sequential code into long instruction words, a VLIW machine was expected to provide from ten to thirty times the performance of a more conventional machine built of the same implementation technology.Multiflow Computer, Inc., has now built a VLIW called the TRACETM along with its companion Trace SchedulingTM compacting compiler. This new machine has fulfilled the performance promises that were made. Using many fast functional units in parallel, this machine extends some of the basic Reduced-Instruction-Set precepts: the architecture is load/store, the microarchitecture is exposed to the compiler, there is no microcode, and there is almost no hardware devoted to synchronization, arbitration, or interlocking of any kind (the compiler has sole responsibility for runtime resource usage).This paper discusses the design of this machine and presents some initial performance results. Robert P. Colwell, Robert P. Nix, John J. O'Donnell, David B. Papworth, Paul K. Rodman |
ASPLOS | 2 |
| 1985 | Editing by ExampleabstractAn editing by example system is an automatic program synthesis facility embedded in a text editor that can be used to solve repetitive text editing problems. The user provides the editor with a few examples of a text transformation. The system analyzes the examples and generalizes them into a program that can perform the transformation to the rest of the user's text. This paper presents an overview of the design, analysis, and implementation of a practical editing by example system. It studies the problem of synthesizing a text processing program that generalizes the transformation implicitly described by a small number of input/output examples. A class of text processing programs called gap programs is defined and the problems associated with synthesizing them from examples are examined, leading to an efficient heuristic that provably synthesizes a gap program from examples of its input/output behavior. The editing by example system derived from this analysis has been embedded in a production text editor. By developing an editing by example system that solves a useful class of text processing problems, this work demonstrates that program synthesis is feasible in the domain of text editing. Robert P. Nix |
ACM Trans. Program. Lang. Syst. | 1 |
| 1984 | Editing by ExampleabstractAn editing by example system is an automatic program synthesis facility embedded in a text editor that can be used to solve repetitive text editing problems. The user provides the editor with a few examples of a text transformation. The system analyzes the examples and generalizes them into a program that can perform the transformation to the rest of the user's text. Robert P. Nix |
POPL | 1 |