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Ping-Sheng Tseng

dblp:84/6988 · DBLP profile ↗
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6ranked-venue papers
5as first author
0since 2021 · last 1992
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 5 · 4 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Parallel and multicore computing · 46% High-performance computing · 31% Processor architecture and microarchitecture · 23%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 6 heaviest of 6, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Compilers and program optimization
parallelizing compiler
0.011990
Compiling Programs for a Linear Systolic Array · PLDI 1990
Processor architecture and microarchitecture
multiprocessor architecture
0.011989
An Orthogonal Multiprocessor for Parallel Scientific Computations · IEEE Trans. Computers 1989
Parallel and multicore computing › parallel computing
parallel scientific computing
0.011989
An Orthogonal Multiprocessor for Parallel Scientific Computations · IEEE Trans. Computers 1989
High-performance computing
scientific computing systems
0.011989
An Orthogonal Multiprocessor for Parallel Scientific Computations · IEEE Trans. Computers 1989
Parallel and multicore computing › multiprocessor system
shared-memory multiprocessor
0.011989
An Orthogonal Multiprocessor for Parallel Scientific Computations · IEEE Trans. Computers 1989
High-performance computing › numerical linear algebra
linear algebra kernel
0.011990
Compiling Programs for a Linear Systolic Array · PLDI 1990

Methods — techniques the papers use, named apart from their topics

data relations · 0.0data compatibility classes · 0.0partially shared memory · 0.0orthogonal busing · 0.0
YearPublicationVenuePosition
1992 Network Parallel Computing with a Command Interpreter
Ping-Sheng Tseng
ICPP (2)1
1990 Compiling Programs for a Linear Systolic Array
abstract
This paper describes an AL compiler for the Warp systolic array. AL is a programming language in which the user programs a systolic array as if it were a sequential computer and relies on the compiler to generate parallel code. This paper introduces the notion of data relations in compiling programs for systolic arrays. Unlike dependence relations among statements of a program, data relations define compatibility relations among data objects of a program. The AL compiler uses data relations to compute data compatibility classes, determine data distribution, and distribute loop iterations. The AL compiler can generate efficient parallel code almost identical to what the user would have written by hand. For example, the AL compiler generates parallel code for the LINPACK LU decomposition (SGEFA) and QR decomposition (SQRDC) routines with a nearly 8-fold speedup on the 10-cell Warp array for matrices of size 180 × 180.
Ping-Sheng Tseng
PLDI1
1990 A Systolic Array Parallelizing Compiler
Ping-Sheng Tseng
J. Parallel Distributed Comput.1
1989 An Orthogonal Multiprocessor for Parallel Scientific Computations
abstract
An architecture called an orthogonal multiprocessor (OMP) is proposed. This OMP architecture has a simplified busing structure and partially shared memory and compares very favorably with fully shared-memory multiprocessors using crossbar switches, multiple buses, or multistage networks. The higher performance comes mainly from significantly increased memory bandwidth, fully exploited parallelism, reduced communication overhead, and lower hardware control complexities. Parallel algorithms being mapped include matrix arithmetic, linear system solver, FFT, array sorting, linear programming, and parallel PDE solutions. In most cases, linear speedup can be achieved on the OMP system. The OMP architecture provides linearly scalable performance and is well suited for building special-purpose scientific computers.>
Kai Hwang 0001, Ping-Sheng Tseng, Dongseung Kim
IEEE Trans. Computers2
1988 Sparse Matrix Computations on Warp
Ping-Sheng Tseng
ICPP (1)1
1985 A VLSI-Based Multiprocessor Architecture for Implementing Parallel Algorithms
Ping-Sheng Tseng, Kai Hwang 0001, Viktor Prasanna 0001
ICPP1