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Raul Compasano

dblp:86/1218 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1990
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation
high-level synthesis
0.011990
Synthesis Using Path-Based scheduling: algorithms and Exercises · DAC 1990
Electronic design automation › high-level synthesis › scheduling
path-based scheduling
0.011990
Synthesis Using Path-Based scheduling: algorithms and Exercises · DAC 1990
Electronic design automation › high-level synthesis
scheduling
0.011990
Synthesis Using Path-Based scheduling: algorithms and Exercises · DAC 1990

Methods — techniques the papers use, named apart from their topics

heuristic · 0.0exact algorithm · 0.0
YearPublicationVenuePosition
1990 Synthesis Using Path-Based scheduling: algorithms and Exercises
abstract
Path-based scheduling algorithms consider all possible sequences of operations (called paths) in a control-flow graph. Unlike most scheduling techniques used in high-level synthesis, they stress optimization across conditional branches. This paper presents several path-based algorithms. An exact algorithm finds the minimum number of control steps required for each possible path being executed. Heuristic solutions were also implemented. Extensive application of these algorithms to the benchmarks of the High-Level Synthesis Workshop showed the practical feasibility of such methods.
Raul Compasano, Reinaldo A. Bergamaschi
DAC1