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Yuusuke Yamada

dblp:86/1362 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2000
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 61% Emerging computing paradigms · 30% GPUs and heterogeneous computing · 9%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
3d integration
0.012000
Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000
Integrated circuit design › 3d integration
3D LSI
0.012000
Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000
Emerging computing paradigms
neuromorphic computing
0.012000
Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000
GPUs and heterogeneous computing
vision processing
0.012000
Smart Vision Chip Fabricated Using Three Dimensional Integration Technology · NIPS 2000

Methods — techniques the papers use, named apart from their topics

three-dimensional LSI technology · 0.0
YearPublicationVenuePosition
2000 Smart Vision Chip Fabricated Using Three Dimensional Integration Technology
abstract
The smart VISIOn chip has a large potential for application in general purpose high speed image processing systems. In order to fabricate smart vision chips including photo detector compactly, we have proposed the application of three dimensional LSI technology for smart vision chips. Three dimensional technology has great potential to realize new neuromorphic systems inspired by not only the biological function but also the biological structure. In this paper, we describe our three dimensional LSI technology for neuromorphic circuits and the design of smart vision chips .
Hiroyuki Kurino, Masaki Nakagawa, Kang Wook Lee 0002, Tomonori Nakamura, Yuusuke Yamada, Ki Tae Park, Mitsumasa Koyanagi
NIPS5