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Reda H. Seireg

dblp:86/4908 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 1998
0009-0008-4046-720XORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test › test response compaction
aliasing probability		 0.011998
A Unified Analytical Expression for Aliasing Error Probability Using Single-Input · IEEE Trans. Computers 1998
Electronic design automation › hardware verification and test › design for testability
built-in self-test		 0.011998
A Unified Analytical Expression for Aliasing Error Probability Using Single-Input · IEEE Trans. Computers 1998
Electronic design automation
hardware verification and test		 0.011998
A Unified Analytical Expression for Aliasing Error Probability Using Single-Input · IEEE Trans. Computers 1998
Electronic design automation › hardware verification and test › test response compaction
signature analysis		 0.011998
A Unified Analytical Expression for Aliasing Error Probability Using Single-Input · IEEE Trans. Computers 1998

Methods — techniques the papers use, named apart from their topics

markov chain analysis · 0.0linear feedback shift register analysis · 0.0
YearPublicationVenuePosition
1998 A Unified Analytical Expression for Aliasing Error Probability Using Single-Input
abstract
In this paper, an exact unified analytical expression for the transient (and the steady state) behavior of the Aliasing Error Probability (AEP) of signature analysis testing using single-input external- and internal-XOR LFSR is deduced. The expression, contrary to what is known in the literature, uses the leftmost bit of the LFSR.
Mahmoud S. Elsaholy, Samir I. Shaheen, Reda H. Seireg
 IEEE Trans. Computers3
1991 Comparison between the dynamic behavior of maximum length and cyclic shift registers
abstract
The study of the performance of maximum length and cyclic shift registers has been extended to broader classes of circuits. A new general form for the characteristic equation of the transition probability matrix was deduced which differs from equations obtained earlier.>
Reda H. Seireg, André G. Vacroux
 VTS1