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Ahmed K. Ezzat

dblp:87/1708 · DBLP profile ↗
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5ranked-venue papers
3as first author
0since 2021 · last 1999
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 2 first-authorArtificial intelligence and machine learning · 1 · 1 first-authorSoftware engineering, systems software and programming languages · 1Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
2 papers
Hardware accelerators and domain-specific architectures · 22% Reconfigurable computing and FPGAs · 22% Distributed systems · 22%
Software engineering, system software, and programming languages
1 paper
Operating systems · 100%

Topics — the 6 heaviest of 7, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Reconfigurable computing and FPGAs › reconfigurable architecture
reconfigurable processor
0.011987
Architecture and Design of the MARS Hardware Accelerator · DAC 1987
Distributed systems
remote execution
0.011987
Location Independent Remote Execution in NEST · IEEE Trans. Software Eng. 1987
Hardware accelerators and domain-specific architectures › scientific computing accelerator
simulation accelerator
0.011987
Architecture and Design of the MARS Hardware Accelerator · DAC 1987
Operating systems › resource management › process management
process migration
0.011987
Location Independent Remote Execution in NEST · IEEE Trans. Software Eng. 1987
Electronic design automation
circuit simulation
0.011987
Architecture and Design of the MARS Hardware Accelerator · DAC 1987
Performance modeling and evaluation › simulation
discrete-event simulation
0.011987
Architecture and Design of the MARS Hardware Accelerator · DAC 1987

Methods — techniques the papers use, named apart from their topics

fault tolerance · 0.0advertisement mechanism · 0.0microprogramming · 0.0
YearPublicationVenuePosition
1999 A Generation Method to Produce GA with GP Capabilities for Signal Modeling
Ahmed K. Ezzat, Nobuhiro Inuzuka, Hidenori Itoh
IEA/AIE1
1987 Architecture and Design of the MARS Hardware Accelerator
abstract
MARS (Microprogrammable Accelerator for Rapid Simulations) is a multiprocessor based hardware accelerator capable of efficiently implementing a wide range of computationally complex algorithms. Its architecture is ideally suited for performing event driven simulations of VLSI circuits. The highly pipelined and parallel architecture of MARS provides a performance comparable to existing hardware simulation engines while its highly flexible architecture supports a wide range of applications. Flexibility is achieved through custom designed microprogrammable and reconfigurable VLSI processors. Logic simulation performance of about one million events per second is easily achievable.
Prathima Agrawal, William J. Dally, Ahmed K. Ezzat, W. C. Fischer, H. V. Jagadish, A. S. Krishnakumar
DAC3
1987 Location Independent Remote Execution in NEST
abstract
We consider a computing environment consisting of a network of autonomous, yet cooperating personal computer workstations and shared servers. Computing cycles in such an environment can be shared by creating a pool of compute servers in the network that may be used by the workstations to supplement their computing needs. Some processors may be permanently designated to be the compute servers. In addition, through an advertisement mechanism, any workstation may make itself temporarily available for a specific duration of time to be used as a compute server. In this paper, we present the design and implementation of a scheme for augmenting the UNIX® operating system with the location independent remote execution capability. This capability allows processes to be offloaded to the compute servers and preserves the execution environment of these processes as if they were still executing locally at the originating machine. Our model provides execution location independence of processes by preserving the process view of the file system, parent-child relationships, process groups, and process signaling across machine boundaries in a transparent way. We also present our scheme that allows processors to advertise themselves as available to some or all nodes in the network and withdraw as a compute server in a distributed manner. The scheme is robust in presence of node failures.
Rakesh Agrawal 0001, Ahmed K. Ezzat
IEEE Trans. Software Eng.2
1986 Task Allocation Heuristics for Distributed Computing Systems
Ahmed K. Ezzat, R. Daniel Bergeron, John L. Pokoski
ICDCS1
1985 Making Oneself Known in a Distributed World
Ahmed K. Ezzat, Rakesh Agrawal 0001
ICPP1