This paper introduces the implicit-IMOR method for differential algebraic equations. This method is a modification of the Index-aware model order reduction (IMOR) method proposed in our earlier papers which is the explicit-IMOR method. It also involves first splitting the differential-algebraic equations (DAEs) into differential and algebraic parts using a basis of projectors. In contrast with the explicit-IMOR method, the implicit-IMOR method leads to implicit differential and algebraic parts. We demonstrate the implicit-IMOR method using the RLC/RC networks, but it can also be applied to other problems which lead to differential-algebraic equations.

A novel model order reduction (MOR) method, SparseRC, for multiterminal RC circuits is proposed. Specifically tailored to systems with many terminals, SparseRC employs graph-partitioning and fill-in reducing orderings to improve sparsity during model reduction, while maintaining accuracy via moment matching. The reduced models are easily converted to their circuit representation. These contain much fewer nodes and circuit elements than otherwise obtained with conventional MOR techniques, allowing faster simulations at little accuracy loss.

The super node algorithm performs model order reduction based on physical principles. Although the algorithm provides us with compact models, its passivity has not thoroughly been studied yet. The loss of passivity is a serious problem because simulations of the reduced network may encounter artificial behavior which render the simulations useless. In this paper we find the reason of delivering non-passive models and propose a modified version of the algorithm which guarantees passivity. This is done by applying a passivity enforcement procedure after frequency fitting step within the algorithm. This allows to preserve passivity while keeping the main advantages of the algorithm. Finally numerical examples validate the proposed approach.

Large resistor networks arise during the design of very-large-scale integration chips as a result of parasitic extraction and electro static discharge analysis. Simulating these large parasitic resistor networks is of vital importance, since it gives an insight into the functional and physical performance of the chip. However, due to the increasing amount of interconnect and metal layers, these networks may contain millions of resistors and nodes, making accurate simulation time consuming or even infeasible. We propose efficient algorithms for three types of analysis of large resistor networks: 1) computation of path resistances; 2) computation of resistor currents; and 3) reduction of resistor networks. The algorithms are exact, orders of magnitude faster than conventional approaches, and enable simulation of very large networks.

Design of integrated RF circuits requires detailed insight in the behavior of the used components. Unintended coupling and perturbation effects need to be accounted for before production, but full simulation of these effects can be expensive or infeasible. In this paper, we present a method to build nonlinear phase macromodels of voltage-controlled oscillators. These models can be used to accurately predict the behavior of individual and mutually coupled oscillators under perturbation at a lower cost than full circuit simulations. The approach is illustrated by numerical experiments with realistic designs.

Analysis and verification environments for next- generation nano-scale RFIC designs must be able to cope with increasing design complexity and to account for new effects, such as process variations and Electromagnetic (EM) couplings. Designed-in passives, substrate, interconnect and devices can no longer be treated in isolation as the interactions between them are becoming more relevant in the behavior of the complete system. At the same time variations in process parameters lead to small changes in the device characteristics that may directly affect system performance. These two effects, however, can not be treated separately as the process variations that modify the physical parameters of the devices also affect those same EM couplings. Accurately capturing the effects of process variations as well as the relevant EM coupling effects requires detailed models that become very expensive to simulate. Reduction techniques able to handle parametric descriptions of linear systems are necessary in order to obtain better simulation performance. In this work Model Order Reduction techniques able to handle parametric system descriptions are presented. Such techniques are based on Structure-Preserving formulations that are able to exploit the hierarchical system representation of designed- in blocks, substrate and interconnect, in order to obtain more efficient simulation models.