Techniques for deriving the minimum length tests are developed for irredundant combinational circuits that contain single faults. The development is based on the Boolean difference function. The Boolean difference function is expanded to form two analytical expressions that can be used to calculate the tests for any stuck-at-zero and stuck-at-one fault within combinational circuits.

The efficient production of LSI realizations of Boolean functions is studied and two interconnection procedures are presented. The first procedure is a modular method using planar circuits. The second procedure, which stresses a minimum number of gates, results in an "all purpose" chip which can be personalized externally by the customer.

This paper concerns the design, implementation, and testing of a stored-programmed special-purpose computer that, when employed as a digital filter, satisfies the requirement of reduced deadband for the input interface element (the analog-to-digital converter). This is accomplished by using a double precision arithmetic process which employs shorter word lengths; and consequently, the physical size (component-wise) and the calculation time of the filter are reduced.

A special-purpose computer organization of a time-shared digital filter suitable for real-time applications is described. The computer is organized in functional modules so that the order of the filter, the coefficients of the filter, the programming form of the filter, and the multiplexing scheme for the filter are readily adaptable to system needs.

Quite frequently, a subject of considerable academic interest will emerge with a flow of textbooks that range from very narrow to very broad in scope. Not quite so frequently, a well-organized and comprehensive textbook is written—Booth has written such a book